x86_64-gen.c 63 KB

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  1. /*
  2. * x86-64 code generator for TCC
  3. *
  4. * Copyright (c) 2008 Shinichiro Hamaji
  5. *
  6. * Based on i386-gen.c by Fabrice Bellard
  7. *
  8. * This library is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU Lesser General Public
  10. * License as published by the Free Software Foundation; either
  11. * version 2 of the License, or (at your option) any later version.
  12. *
  13. * This library is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * Lesser General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU Lesser General Public
  19. * License along with this library; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #ifdef TARGET_DEFS_ONLY
  23. /* number of available registers */
  24. #define NB_REGS 25
  25. #define NB_ASM_REGS 16
  26. #define CONFIG_TCC_ASM
  27. /* a register can belong to several classes. The classes must be
  28. sorted from more general to more precise (see gv2() code which does
  29. assumptions on it). */
  30. #define RC_INT 0x0001 /* generic integer register */
  31. #define RC_FLOAT 0x0002 /* generic float register */
  32. #define RC_RAX 0x0004
  33. #define RC_RCX 0x0008
  34. #define RC_RDX 0x0010
  35. #define RC_ST0 0x0080 /* only for long double */
  36. #define RC_R8 0x0100
  37. #define RC_R9 0x0200
  38. #define RC_R10 0x0400
  39. #define RC_R11 0x0800
  40. #define RC_XMM0 0x1000
  41. #define RC_XMM1 0x2000
  42. #define RC_XMM2 0x4000
  43. #define RC_XMM3 0x8000
  44. #define RC_XMM4 0x10000
  45. #define RC_XMM5 0x20000
  46. #define RC_XMM6 0x40000
  47. #define RC_XMM7 0x80000
  48. #define RC_IRET RC_RAX /* function return: integer register */
  49. #define RC_LRET RC_RDX /* function return: second integer register */
  50. #define RC_FRET RC_XMM0 /* function return: float register */
  51. #define RC_QRET RC_XMM1 /* function return: second float register */
  52. /* pretty names for the registers */
  53. enum {
  54. TREG_RAX = 0,
  55. TREG_RCX = 1,
  56. TREG_RDX = 2,
  57. TREG_RSP = 4,
  58. TREG_RSI = 6,
  59. TREG_RDI = 7,
  60. TREG_R8 = 8,
  61. TREG_R9 = 9,
  62. TREG_R10 = 10,
  63. TREG_R11 = 11,
  64. TREG_XMM0 = 16,
  65. TREG_XMM1 = 17,
  66. TREG_XMM2 = 18,
  67. TREG_XMM3 = 19,
  68. TREG_XMM4 = 20,
  69. TREG_XMM5 = 21,
  70. TREG_XMM6 = 22,
  71. TREG_XMM7 = 23,
  72. TREG_ST0 = 24,
  73. TREG_MEM = 0x20
  74. };
  75. #define REX_BASE(reg) (((reg) >> 3) & 1)
  76. #define REG_VALUE(reg) ((reg) & 7)
  77. /* return registers for function */
  78. #define REG_IRET TREG_RAX /* single word int return register */
  79. #define REG_LRET TREG_RDX /* second word return register (for long long) */
  80. #define REG_FRET TREG_XMM0 /* float return register */
  81. #define REG_QRET TREG_XMM1 /* second float return register */
  82. /* defined if function parameters must be evaluated in reverse order */
  83. #define INVERT_FUNC_PARAMS
  84. /* pointer size, in bytes */
  85. #define PTR_SIZE 8
  86. /* long double size and alignment, in bytes */
  87. #define LDOUBLE_SIZE 16
  88. #define LDOUBLE_ALIGN 16
  89. /* maximum alignment (for aligned attribute support) */
  90. #define MAX_ALIGN 16
  91. /******************************************************/
  92. #else /* ! TARGET_DEFS_ONLY */
  93. /******************************************************/
  94. #include "tcc.h"
  95. #include <assert.h>
  96. ST_DATA const int reg_classes[NB_REGS] = {
  97. /* eax */ RC_INT | RC_RAX,
  98. /* ecx */ RC_INT | RC_RCX,
  99. /* edx */ RC_INT | RC_RDX,
  100. 0,
  101. 0,
  102. 0,
  103. 0,
  104. 0,
  105. RC_R8,
  106. RC_R9,
  107. RC_R10,
  108. RC_R11,
  109. 0,
  110. 0,
  111. 0,
  112. 0,
  113. /* xmm0 */ RC_FLOAT | RC_XMM0,
  114. /* xmm1 */ RC_FLOAT | RC_XMM1,
  115. /* xmm2 */ RC_FLOAT | RC_XMM2,
  116. /* xmm3 */ RC_FLOAT | RC_XMM3,
  117. /* xmm4 */ RC_FLOAT | RC_XMM4,
  118. /* xmm5 */ RC_FLOAT | RC_XMM5,
  119. /* xmm6 an xmm7 are included so gv() can be used on them,
  120. but they are not tagged with RC_FLOAT because they are
  121. callee saved on Windows */
  122. RC_XMM6,
  123. RC_XMM7,
  124. /* st0 */ RC_ST0
  125. };
  126. static unsigned long func_sub_sp_offset;
  127. static int func_ret_sub;
  128. /* XXX: make it faster ? */
  129. ST_FUNC void g(int c)
  130. {
  131. int ind1;
  132. if (nocode_wanted)
  133. return;
  134. ind1 = ind + 1;
  135. if (ind1 > cur_text_section->data_allocated)
  136. section_realloc(cur_text_section, ind1);
  137. cur_text_section->data[ind] = c;
  138. ind = ind1;
  139. }
  140. ST_FUNC void o(unsigned int c)
  141. {
  142. while (c) {
  143. g(c);
  144. c = c >> 8;
  145. }
  146. }
  147. ST_FUNC void gen_le16(int v)
  148. {
  149. g(v);
  150. g(v >> 8);
  151. }
  152. ST_FUNC void gen_le32(int c)
  153. {
  154. g(c);
  155. g(c >> 8);
  156. g(c >> 16);
  157. g(c >> 24);
  158. }
  159. ST_FUNC void gen_le64(int64_t c)
  160. {
  161. g(c);
  162. g(c >> 8);
  163. g(c >> 16);
  164. g(c >> 24);
  165. g(c >> 32);
  166. g(c >> 40);
  167. g(c >> 48);
  168. g(c >> 56);
  169. }
  170. static void orex(int ll, int r, int r2, int b)
  171. {
  172. if ((r & VT_VALMASK) >= VT_CONST)
  173. r = 0;
  174. if ((r2 & VT_VALMASK) >= VT_CONST)
  175. r2 = 0;
  176. if (ll || REX_BASE(r) || REX_BASE(r2))
  177. o(0x40 | REX_BASE(r) | (REX_BASE(r2) << 2) | (ll << 3));
  178. o(b);
  179. }
  180. /* output a symbol and patch all calls to it */
  181. ST_FUNC void gsym_addr(int t, int a)
  182. {
  183. while (t) {
  184. unsigned char *ptr = cur_text_section->data + t;
  185. uint32_t n = read32le(ptr); /* next value */
  186. write32le(ptr, a - t - 4);
  187. t = n;
  188. }
  189. }
  190. void gsym(int t)
  191. {
  192. gsym_addr(t, ind);
  193. }
  194. static int is64_type(int t)
  195. {
  196. return ((t & VT_BTYPE) == VT_PTR ||
  197. (t & VT_BTYPE) == VT_FUNC ||
  198. (t & VT_BTYPE) == VT_LLONG);
  199. }
  200. /* instruction + 4 bytes data. Return the address of the data */
  201. static int oad(int c, int s)
  202. {
  203. int t;
  204. if (nocode_wanted)
  205. return s;
  206. o(c);
  207. t = ind;
  208. gen_le32(s);
  209. return t;
  210. }
  211. /* generate jmp to a label */
  212. #define gjmp2(instr,lbl) oad(instr,lbl)
  213. ST_FUNC void gen_addr32(int r, Sym *sym, int c)
  214. {
  215. if (r & VT_SYM)
  216. greloca(cur_text_section, sym, ind, R_X86_64_32S, c), c=0;
  217. gen_le32(c);
  218. }
  219. /* output constant with relocation if 'r & VT_SYM' is true */
  220. ST_FUNC void gen_addr64(int r, Sym *sym, int64_t c)
  221. {
  222. if (r & VT_SYM)
  223. greloca(cur_text_section, sym, ind, R_X86_64_64, c), c=0;
  224. gen_le64(c);
  225. }
  226. /* output constant with relocation if 'r & VT_SYM' is true */
  227. ST_FUNC void gen_addrpc32(int r, Sym *sym, int c)
  228. {
  229. if (r & VT_SYM)
  230. greloca(cur_text_section, sym, ind, R_X86_64_PC32, c-4), c=4;
  231. gen_le32(c-4);
  232. }
  233. /* output got address with relocation */
  234. static void gen_gotpcrel(int r, Sym *sym, int c)
  235. {
  236. #ifdef TCC_TARGET_PE
  237. tcc_error("internal error: no GOT on PE: %s %x %x | %02x %02x %02x\n",
  238. get_tok_str(sym->v, NULL), c, r,
  239. cur_text_section->data[ind-3],
  240. cur_text_section->data[ind-2],
  241. cur_text_section->data[ind-1]
  242. );
  243. #endif
  244. greloca(cur_text_section, sym, ind, R_X86_64_GOTPCREL, -4);
  245. gen_le32(0);
  246. if (c) {
  247. /* we use add c, %xxx for displacement */
  248. orex(1, r, 0, 0x81);
  249. o(0xc0 + REG_VALUE(r));
  250. gen_le32(c);
  251. }
  252. }
  253. static void gen_modrm_impl(int op_reg, int r, Sym *sym, int c, int is_got)
  254. {
  255. op_reg = REG_VALUE(op_reg) << 3;
  256. if ((r & VT_VALMASK) == VT_CONST) {
  257. /* constant memory reference */
  258. if (!(r & VT_SYM)) {
  259. /* Absolute memory reference */
  260. o(0x04 | op_reg); /* [sib] | destreg */
  261. oad(0x25, c); /* disp32 */
  262. } else {
  263. o(0x05 | op_reg); /* (%rip)+disp32 | destreg */
  264. if (is_got) {
  265. gen_gotpcrel(r, sym, c);
  266. } else {
  267. gen_addrpc32(r, sym, c);
  268. }
  269. }
  270. } else if ((r & VT_VALMASK) == VT_LOCAL) {
  271. /* currently, we use only ebp as base */
  272. if (c == (char)c) {
  273. /* short reference */
  274. o(0x45 | op_reg);
  275. g(c);
  276. } else {
  277. oad(0x85 | op_reg, c);
  278. }
  279. } else if ((r & VT_VALMASK) >= TREG_MEM) {
  280. if (c) {
  281. g(0x80 | op_reg | REG_VALUE(r));
  282. gen_le32(c);
  283. } else {
  284. g(0x00 | op_reg | REG_VALUE(r));
  285. }
  286. } else {
  287. g(0x00 | op_reg | REG_VALUE(r));
  288. }
  289. }
  290. /* generate a modrm reference. 'op_reg' contains the additional 3
  291. opcode bits */
  292. static void gen_modrm(int op_reg, int r, Sym *sym, int c)
  293. {
  294. gen_modrm_impl(op_reg, r, sym, c, 0);
  295. }
  296. /* generate a modrm reference. 'op_reg' contains the additional 3
  297. opcode bits */
  298. static void gen_modrm64(int opcode, int op_reg, int r, Sym *sym, int c)
  299. {
  300. int is_got;
  301. is_got = (op_reg & TREG_MEM) && !(sym->type.t & VT_STATIC);
  302. orex(1, r, op_reg, opcode);
  303. gen_modrm_impl(op_reg, r, sym, c, is_got);
  304. }
  305. /* load 'r' from value 'sv' */
  306. void load(int r, SValue *sv)
  307. {
  308. int v, t, ft, fc, fr;
  309. SValue v1;
  310. #ifdef TCC_TARGET_PE
  311. SValue v2;
  312. sv = pe_getimport(sv, &v2);
  313. #endif
  314. fr = sv->r;
  315. ft = sv->type.t & ~VT_DEFSIGN;
  316. fc = sv->c.i;
  317. if (fc != sv->c.i && (fr & VT_SYM))
  318. tcc_error("64 bit addend in load");
  319. ft &= ~(VT_VOLATILE | VT_CONSTANT);
  320. #ifndef TCC_TARGET_PE
  321. /* we use indirect access via got */
  322. if ((fr & VT_VALMASK) == VT_CONST && (fr & VT_SYM) &&
  323. (fr & VT_LVAL) && !(sv->sym->type.t & VT_STATIC)) {
  324. /* use the result register as a temporal register */
  325. int tr = r | TREG_MEM;
  326. if (is_float(ft)) {
  327. /* we cannot use float registers as a temporal register */
  328. tr = get_reg(RC_INT) | TREG_MEM;
  329. }
  330. gen_modrm64(0x8b, tr, fr, sv->sym, 0);
  331. /* load from the temporal register */
  332. fr = tr | VT_LVAL;
  333. }
  334. #endif
  335. v = fr & VT_VALMASK;
  336. if (fr & VT_LVAL) {
  337. int b, ll;
  338. if (v == VT_LLOCAL) {
  339. v1.type.t = VT_PTR;
  340. v1.r = VT_LOCAL | VT_LVAL;
  341. v1.c.i = fc;
  342. fr = r;
  343. if (!(reg_classes[fr] & (RC_INT|RC_R11)))
  344. fr = get_reg(RC_INT);
  345. load(fr, &v1);
  346. }
  347. if (fc != sv->c.i) {
  348. /* If the addends doesn't fit into a 32bit signed
  349. we must use a 64bit move. We've checked above
  350. that this doesn't have a sym associated. */
  351. v1.type.t = VT_LLONG;
  352. v1.r = VT_CONST;
  353. v1.c.i = sv->c.i;
  354. fr = r;
  355. if (!(reg_classes[fr] & (RC_INT|RC_R11)))
  356. fr = get_reg(RC_INT);
  357. load(fr, &v1);
  358. fc = 0;
  359. }
  360. ll = 0;
  361. /* Like GCC we can load from small enough properly sized
  362. structs and unions as well.
  363. XXX maybe move to generic operand handling, but should
  364. occur only with asm, so tccasm.c might also be a better place */
  365. if ((ft & VT_BTYPE) == VT_STRUCT) {
  366. int align;
  367. switch (type_size(&sv->type, &align)) {
  368. case 1: ft = VT_BYTE; break;
  369. case 2: ft = VT_SHORT; break;
  370. case 4: ft = VT_INT; break;
  371. case 8: ft = VT_LLONG; break;
  372. default:
  373. tcc_error("invalid aggregate type for register load");
  374. break;
  375. }
  376. }
  377. if ((ft & VT_BTYPE) == VT_FLOAT) {
  378. b = 0x6e0f66;
  379. r = REG_VALUE(r); /* movd */
  380. } else if ((ft & VT_BTYPE) == VT_DOUBLE) {
  381. b = 0x7e0ff3; /* movq */
  382. r = REG_VALUE(r);
  383. } else if ((ft & VT_BTYPE) == VT_LDOUBLE) {
  384. b = 0xdb, r = 5; /* fldt */
  385. } else if ((ft & VT_TYPE) == VT_BYTE || (ft & VT_TYPE) == VT_BOOL) {
  386. b = 0xbe0f; /* movsbl */
  387. } else if ((ft & VT_TYPE) == (VT_BYTE | VT_UNSIGNED)) {
  388. b = 0xb60f; /* movzbl */
  389. } else if ((ft & VT_TYPE) == VT_SHORT) {
  390. b = 0xbf0f; /* movswl */
  391. } else if ((ft & VT_TYPE) == (VT_SHORT | VT_UNSIGNED)) {
  392. b = 0xb70f; /* movzwl */
  393. } else {
  394. assert(((ft & VT_BTYPE) == VT_INT)
  395. || ((ft & VT_BTYPE) == VT_LLONG)
  396. || ((ft & VT_BTYPE) == VT_PTR)
  397. || ((ft & VT_BTYPE) == VT_FUNC)
  398. );
  399. ll = is64_type(ft);
  400. b = 0x8b;
  401. }
  402. if (ll) {
  403. gen_modrm64(b, r, fr, sv->sym, fc);
  404. } else {
  405. orex(ll, fr, r, b);
  406. gen_modrm(r, fr, sv->sym, fc);
  407. }
  408. } else {
  409. if (v == VT_CONST) {
  410. if (fr & VT_SYM) {
  411. #ifdef TCC_TARGET_PE
  412. orex(1,0,r,0x8d);
  413. o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
  414. gen_addrpc32(fr, sv->sym, fc);
  415. #else
  416. if (sv->sym->type.t & VT_STATIC) {
  417. orex(1,0,r,0x8d);
  418. o(0x05 + REG_VALUE(r) * 8); /* lea xx(%rip), r */
  419. gen_addrpc32(fr, sv->sym, fc);
  420. } else {
  421. orex(1,0,r,0x8b);
  422. o(0x05 + REG_VALUE(r) * 8); /* mov xx(%rip), r */
  423. gen_gotpcrel(r, sv->sym, fc);
  424. }
  425. #endif
  426. } else if (is64_type(ft)) {
  427. orex(1,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
  428. gen_le64(sv->c.i);
  429. } else {
  430. orex(0,r,0, 0xb8 + REG_VALUE(r)); /* mov $xx, r */
  431. gen_le32(fc);
  432. }
  433. } else if (v == VT_LOCAL) {
  434. orex(1,0,r,0x8d); /* lea xxx(%ebp), r */
  435. gen_modrm(r, VT_LOCAL, sv->sym, fc);
  436. } else if (v == VT_CMP) {
  437. orex(0,r,0,0);
  438. if ((fc & ~0x100) != TOK_NE)
  439. oad(0xb8 + REG_VALUE(r), 0); /* mov $0, r */
  440. else
  441. oad(0xb8 + REG_VALUE(r), 1); /* mov $1, r */
  442. if (fc & 0x100)
  443. {
  444. /* This was a float compare. If the parity bit is
  445. set the result was unordered, meaning false for everything
  446. except TOK_NE, and true for TOK_NE. */
  447. fc &= ~0x100;
  448. o(0x037a + (REX_BASE(r) << 8));
  449. }
  450. orex(0,r,0, 0x0f); /* setxx %br */
  451. o(fc);
  452. o(0xc0 + REG_VALUE(r));
  453. } else if (v == VT_JMP || v == VT_JMPI) {
  454. t = v & 1;
  455. orex(0,r,0,0);
  456. oad(0xb8 + REG_VALUE(r), t); /* mov $1, r */
  457. o(0x05eb + (REX_BASE(r) << 8)); /* jmp after */
  458. gsym(fc);
  459. orex(0,r,0,0);
  460. oad(0xb8 + REG_VALUE(r), t ^ 1); /* mov $0, r */
  461. } else if (v != r) {
  462. if ((r >= TREG_XMM0) && (r <= TREG_XMM7)) {
  463. if (v == TREG_ST0) {
  464. /* gen_cvt_ftof(VT_DOUBLE); */
  465. o(0xf0245cdd); /* fstpl -0x10(%rsp) */
  466. /* movsd -0x10(%rsp),%xmmN */
  467. o(0x100ff2);
  468. o(0x44 + REG_VALUE(r)*8); /* %xmmN */
  469. o(0xf024);
  470. } else {
  471. assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
  472. if ((ft & VT_BTYPE) == VT_FLOAT) {
  473. o(0x100ff3);
  474. } else {
  475. assert((ft & VT_BTYPE) == VT_DOUBLE);
  476. o(0x100ff2);
  477. }
  478. o(0xc0 + REG_VALUE(v) + REG_VALUE(r)*8);
  479. }
  480. } else if (r == TREG_ST0) {
  481. assert((v >= TREG_XMM0) && (v <= TREG_XMM7));
  482. /* gen_cvt_ftof(VT_LDOUBLE); */
  483. /* movsd %xmmN,-0x10(%rsp) */
  484. o(0x110ff2);
  485. o(0x44 + REG_VALUE(r)*8); /* %xmmN */
  486. o(0xf024);
  487. o(0xf02444dd); /* fldl -0x10(%rsp) */
  488. } else {
  489. orex(1,r,v, 0x89);
  490. o(0xc0 + REG_VALUE(r) + REG_VALUE(v) * 8); /* mov v, r */
  491. }
  492. }
  493. }
  494. }
  495. /* store register 'r' in lvalue 'v' */
  496. void store(int r, SValue *v)
  497. {
  498. int fr, bt, ft, fc;
  499. int op64 = 0;
  500. /* store the REX prefix in this variable when PIC is enabled */
  501. int pic = 0;
  502. #ifdef TCC_TARGET_PE
  503. SValue v2;
  504. v = pe_getimport(v, &v2);
  505. #endif
  506. fr = v->r & VT_VALMASK;
  507. ft = v->type.t;
  508. fc = v->c.i;
  509. if (fc != v->c.i && (fr & VT_SYM))
  510. tcc_error("64 bit addend in store");
  511. ft &= ~(VT_VOLATILE | VT_CONSTANT);
  512. bt = ft & VT_BTYPE;
  513. #ifndef TCC_TARGET_PE
  514. /* we need to access the variable via got */
  515. if (fr == VT_CONST && (v->r & VT_SYM)) {
  516. /* mov xx(%rip), %r11 */
  517. o(0x1d8b4c);
  518. gen_gotpcrel(TREG_R11, v->sym, v->c.i);
  519. pic = is64_type(bt) ? 0x49 : 0x41;
  520. }
  521. #endif
  522. /* XXX: incorrect if float reg to reg */
  523. if (bt == VT_FLOAT) {
  524. o(0x66);
  525. o(pic);
  526. o(0x7e0f); /* movd */
  527. r = REG_VALUE(r);
  528. } else if (bt == VT_DOUBLE) {
  529. o(0x66);
  530. o(pic);
  531. o(0xd60f); /* movq */
  532. r = REG_VALUE(r);
  533. } else if (bt == VT_LDOUBLE) {
  534. o(0xc0d9); /* fld %st(0) */
  535. o(pic);
  536. o(0xdb); /* fstpt */
  537. r = 7;
  538. } else {
  539. if (bt == VT_SHORT)
  540. o(0x66);
  541. o(pic);
  542. if (bt == VT_BYTE || bt == VT_BOOL)
  543. orex(0, 0, r, 0x88);
  544. else if (is64_type(bt))
  545. op64 = 0x89;
  546. else
  547. orex(0, 0, r, 0x89);
  548. }
  549. if (pic) {
  550. /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
  551. if (op64)
  552. o(op64);
  553. o(3 + (r << 3));
  554. } else if (op64) {
  555. if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
  556. gen_modrm64(op64, r, v->r, v->sym, fc);
  557. } else if (fr != r) {
  558. /* XXX: don't we really come here? */
  559. abort();
  560. o(0xc0 + fr + r * 8); /* mov r, fr */
  561. }
  562. } else {
  563. if (fr == VT_CONST || fr == VT_LOCAL || (v->r & VT_LVAL)) {
  564. gen_modrm(r, v->r, v->sym, fc);
  565. } else if (fr != r) {
  566. /* XXX: don't we really come here? */
  567. abort();
  568. o(0xc0 + fr + r * 8); /* mov r, fr */
  569. }
  570. }
  571. }
  572. /* 'is_jmp' is '1' if it is a jump */
  573. static void gcall_or_jmp(int is_jmp)
  574. {
  575. int r;
  576. if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST &&
  577. ((vtop->r & VT_SYM) && (vtop->c.i-4) == (int)(vtop->c.i-4))) {
  578. /* constant symbolic case -> simple relocation */
  579. #ifdef TCC_TARGET_PE
  580. greloca(cur_text_section, vtop->sym, ind + 1, R_X86_64_PC32, (int)(vtop->c.i-4));
  581. #else
  582. greloca(cur_text_section, vtop->sym, ind + 1, R_X86_64_PLT32, (int)(vtop->c.i-4));
  583. #endif
  584. oad(0xe8 + is_jmp, 0); /* call/jmp im */
  585. } else {
  586. /* otherwise, indirect call */
  587. r = TREG_R11;
  588. load(r, vtop);
  589. o(0x41); /* REX */
  590. o(0xff); /* call/jmp *r */
  591. o(0xd0 + REG_VALUE(r) + (is_jmp << 4));
  592. }
  593. }
  594. #if defined(CONFIG_TCC_BCHECK)
  595. #ifndef TCC_TARGET_PE
  596. static addr_t func_bound_offset;
  597. static unsigned long func_bound_ind;
  598. #endif
  599. static void gen_static_call(int v)
  600. {
  601. Sym *sym = external_global_sym(v, &func_old_type, 0);
  602. oad(0xe8, 0);
  603. greloca(cur_text_section, sym, ind-4, R_X86_64_PC32, -4);
  604. }
  605. /* generate a bounded pointer addition */
  606. ST_FUNC void gen_bounded_ptr_add(void)
  607. {
  608. /* save all temporary registers */
  609. save_regs(0);
  610. /* prepare fast x86_64 function call */
  611. gv(RC_RAX);
  612. o(0xc68948); // mov %rax,%rsi ## second arg in %rsi, this must be size
  613. vtop--;
  614. gv(RC_RAX);
  615. o(0xc78948); // mov %rax,%rdi ## first arg in %rdi, this must be ptr
  616. vtop--;
  617. /* do a fast function call */
  618. gen_static_call(TOK___bound_ptr_add);
  619. /* returned pointer is in rax */
  620. vtop++;
  621. vtop->r = TREG_RAX | VT_BOUNDED;
  622. /* relocation offset of the bounding function call point */
  623. vtop->c.i = (cur_text_section->reloc->data_offset - sizeof(ElfW(Rela)));
  624. }
  625. /* patch pointer addition in vtop so that pointer dereferencing is
  626. also tested */
  627. ST_FUNC void gen_bounded_ptr_deref(void)
  628. {
  629. addr_t func;
  630. int size, align;
  631. ElfW(Rela) *rel;
  632. Sym *sym;
  633. size = 0;
  634. /* XXX: put that code in generic part of tcc */
  635. if (!is_float(vtop->type.t)) {
  636. if (vtop->r & VT_LVAL_BYTE)
  637. size = 1;
  638. else if (vtop->r & VT_LVAL_SHORT)
  639. size = 2;
  640. }
  641. if (!size)
  642. size = type_size(&vtop->type, &align);
  643. switch(size) {
  644. case 1: func = TOK___bound_ptr_indir1; break;
  645. case 2: func = TOK___bound_ptr_indir2; break;
  646. case 4: func = TOK___bound_ptr_indir4; break;
  647. case 8: func = TOK___bound_ptr_indir8; break;
  648. case 12: func = TOK___bound_ptr_indir12; break;
  649. case 16: func = TOK___bound_ptr_indir16; break;
  650. default:
  651. tcc_error("unhandled size when dereferencing bounded pointer");
  652. func = 0;
  653. break;
  654. }
  655. sym = external_global_sym(func, &func_old_type, 0);
  656. if (!sym->c)
  657. put_extern_sym(sym, NULL, 0, 0);
  658. /* patch relocation */
  659. /* XXX: find a better solution ? */
  660. rel = (ElfW(Rela) *)(cur_text_section->reloc->data + vtop->c.i);
  661. rel->r_info = ELF64_R_INFO(sym->c, ELF64_R_TYPE(rel->r_info));
  662. }
  663. #endif
  664. #ifdef TCC_TARGET_PE
  665. #define REGN 4
  666. static const uint8_t arg_regs[REGN] = {
  667. TREG_RCX, TREG_RDX, TREG_R8, TREG_R9
  668. };
  669. /* Prepare arguments in R10 and R11 rather than RCX and RDX
  670. because gv() will not ever use these */
  671. static int arg_prepare_reg(int idx) {
  672. if (idx == 0 || idx == 1)
  673. /* idx=0: r10, idx=1: r11 */
  674. return idx + 10;
  675. else
  676. return arg_regs[idx];
  677. }
  678. static int func_scratch, func_alloca;
  679. /* Generate function call. The function address is pushed first, then
  680. all the parameters in call order. This functions pops all the
  681. parameters and the function address. */
  682. static void gen_offs_sp(int b, int r, int d)
  683. {
  684. orex(1,0,r & 0x100 ? 0 : r, b);
  685. if (d == (char)d) {
  686. o(0x2444 | (REG_VALUE(r) << 3));
  687. g(d);
  688. } else {
  689. o(0x2484 | (REG_VALUE(r) << 3));
  690. gen_le32(d);
  691. }
  692. }
  693. static int using_regs(int size)
  694. {
  695. return !(size > 8 || (size & (size - 1)));
  696. }
  697. /* Return the number of registers needed to return the struct, or 0 if
  698. returning via struct pointer. */
  699. ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize)
  700. {
  701. int size, align;
  702. *ret_align = 1; // Never have to re-align return values for x86-64
  703. *regsize = 8;
  704. size = type_size(vt, &align);
  705. if (!using_regs(size))
  706. return 0;
  707. if (size == 8)
  708. ret->t = VT_LLONG;
  709. else if (size == 4)
  710. ret->t = VT_INT;
  711. else if (size == 2)
  712. ret->t = VT_SHORT;
  713. else
  714. ret->t = VT_BYTE;
  715. ret->ref = NULL;
  716. return 1;
  717. }
  718. static int is_sse_float(int t) {
  719. int bt;
  720. bt = t & VT_BTYPE;
  721. return bt == VT_DOUBLE || bt == VT_FLOAT;
  722. }
  723. static int gfunc_arg_size(CType *type) {
  724. int align;
  725. if (type->t & (VT_ARRAY|VT_BITFIELD))
  726. return 8;
  727. return type_size(type, &align);
  728. }
  729. void gfunc_call(int nb_args)
  730. {
  731. int size, r, args_size, i, d, bt, struct_size;
  732. int arg;
  733. args_size = (nb_args < REGN ? REGN : nb_args) * PTR_SIZE;
  734. arg = nb_args;
  735. /* for struct arguments, we need to call memcpy and the function
  736. call breaks register passing arguments we are preparing.
  737. So, we process arguments which will be passed by stack first. */
  738. struct_size = args_size;
  739. for(i = 0; i < nb_args; i++) {
  740. SValue *sv;
  741. --arg;
  742. sv = &vtop[-i];
  743. bt = (sv->type.t & VT_BTYPE);
  744. size = gfunc_arg_size(&sv->type);
  745. if (using_regs(size))
  746. continue; /* arguments smaller than 8 bytes passed in registers or on stack */
  747. if (bt == VT_STRUCT) {
  748. /* align to stack align size */
  749. size = (size + 15) & ~15;
  750. /* generate structure store */
  751. r = get_reg(RC_INT);
  752. gen_offs_sp(0x8d, r, struct_size);
  753. struct_size += size;
  754. /* generate memcpy call */
  755. vset(&sv->type, r | VT_LVAL, 0);
  756. vpushv(sv);
  757. vstore();
  758. --vtop;
  759. } else if (bt == VT_LDOUBLE) {
  760. gv(RC_ST0);
  761. gen_offs_sp(0xdb, 0x107, struct_size);
  762. struct_size += 16;
  763. }
  764. }
  765. if (func_scratch < struct_size)
  766. func_scratch = struct_size;
  767. arg = nb_args;
  768. struct_size = args_size;
  769. for(i = 0; i < nb_args; i++) {
  770. --arg;
  771. bt = (vtop->type.t & VT_BTYPE);
  772. size = gfunc_arg_size(&vtop->type);
  773. if (!using_regs(size)) {
  774. /* align to stack align size */
  775. size = (size + 15) & ~15;
  776. if (arg >= REGN) {
  777. d = get_reg(RC_INT);
  778. gen_offs_sp(0x8d, d, struct_size);
  779. gen_offs_sp(0x89, d, arg*8);
  780. } else {
  781. d = arg_prepare_reg(arg);
  782. gen_offs_sp(0x8d, d, struct_size);
  783. }
  784. struct_size += size;
  785. } else {
  786. if (is_sse_float(vtop->type.t)) {
  787. if (tcc_state->nosse)
  788. tcc_error("SSE disabled");
  789. if (arg >= REGN) {
  790. gv(RC_XMM0);
  791. /* movq %xmm0, j*8(%rsp) */
  792. gen_offs_sp(0xd60f66, 0x100, arg*8);
  793. } else {
  794. /* Load directly to xmmN register */
  795. gv(RC_XMM0 << arg);
  796. d = arg_prepare_reg(arg);
  797. /* mov %xmmN, %rxx */
  798. o(0x66);
  799. orex(1,d,0, 0x7e0f);
  800. o(0xc0 + arg*8 + REG_VALUE(d));
  801. }
  802. } else {
  803. if (bt == VT_STRUCT) {
  804. vtop->type.ref = NULL;
  805. vtop->type.t = size > 4 ? VT_LLONG : size > 2 ? VT_INT
  806. : size > 1 ? VT_SHORT : VT_BYTE;
  807. }
  808. r = gv(RC_INT);
  809. if (arg >= REGN) {
  810. gen_offs_sp(0x89, r, arg*8);
  811. } else {
  812. d = arg_prepare_reg(arg);
  813. orex(1,d,r,0x89); /* mov */
  814. o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
  815. }
  816. }
  817. }
  818. vtop--;
  819. }
  820. save_regs(0);
  821. /* Copy R10 and R11 into RCX and RDX, respectively */
  822. if (nb_args > 0) {
  823. o(0xd1894c); /* mov %r10, %rcx */
  824. if (nb_args > 1) {
  825. o(0xda894c); /* mov %r11, %rdx */
  826. }
  827. }
  828. gcall_or_jmp(0);
  829. if ((vtop->r & VT_SYM) && vtop->sym->v == TOK_alloca) {
  830. /* need to add the "func_scratch" area after alloca */
  831. o(0x0548), gen_le32(func_alloca), func_alloca = ind - 4;
  832. }
  833. /* other compilers don't clear the upper bits when returning char/short */
  834. bt = vtop->type.ref->type.t & (VT_BTYPE | VT_UNSIGNED);
  835. if (bt == (VT_BYTE | VT_UNSIGNED))
  836. o(0xc0b60f); /* movzbl %al, %eax */
  837. else if (bt == VT_BYTE)
  838. o(0xc0be0f); /* movsbl %al, %eax */
  839. else if (bt == VT_SHORT)
  840. o(0x98); /* cwtl */
  841. else if (bt == (VT_SHORT | VT_UNSIGNED))
  842. o(0xc0b70f); /* movzbl %al, %eax */
  843. #if 0 /* handled in gen_cast() */
  844. else if (bt == VT_INT)
  845. o(0x9848); /* cltq */
  846. else if (bt == (VT_INT | VT_UNSIGNED))
  847. o(0xc089); /* mov %eax,%eax */
  848. #endif
  849. vtop--;
  850. }
  851. #define FUNC_PROLOG_SIZE 11
  852. /* generate function prolog of type 't' */
  853. void gfunc_prolog(CType *func_type)
  854. {
  855. int addr, reg_param_index, bt, size;
  856. Sym *sym;
  857. CType *type;
  858. func_ret_sub = 0;
  859. func_scratch = 0;
  860. func_alloca = 0;
  861. loc = 0;
  862. addr = PTR_SIZE * 2;
  863. ind += FUNC_PROLOG_SIZE;
  864. func_sub_sp_offset = ind;
  865. reg_param_index = 0;
  866. sym = func_type->ref;
  867. /* if the function returns a structure, then add an
  868. implicit pointer parameter */
  869. func_vt = sym->type;
  870. func_var = (sym->f.func_type == FUNC_ELLIPSIS);
  871. size = gfunc_arg_size(&func_vt);
  872. if (!using_regs(size)) {
  873. gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
  874. func_vc = addr;
  875. reg_param_index++;
  876. addr += 8;
  877. }
  878. /* define parameters */
  879. while ((sym = sym->next) != NULL) {
  880. type = &sym->type;
  881. bt = type->t & VT_BTYPE;
  882. size = gfunc_arg_size(type);
  883. if (!using_regs(size)) {
  884. if (reg_param_index < REGN) {
  885. gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
  886. }
  887. sym_push(sym->v & ~SYM_FIELD, type,
  888. VT_LLOCAL | lvalue_type(type->t), addr);
  889. } else {
  890. if (reg_param_index < REGN) {
  891. /* save arguments passed by register */
  892. if ((bt == VT_FLOAT) || (bt == VT_DOUBLE)) {
  893. if (tcc_state->nosse)
  894. tcc_error("SSE disabled");
  895. o(0xd60f66); /* movq */
  896. gen_modrm(reg_param_index, VT_LOCAL, NULL, addr);
  897. } else {
  898. gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
  899. }
  900. }
  901. sym_push(sym->v & ~SYM_FIELD, type,
  902. VT_LOCAL | lvalue_type(type->t), addr);
  903. }
  904. addr += 8;
  905. reg_param_index++;
  906. }
  907. while (reg_param_index < REGN) {
  908. if (func_type->ref->f.func_type == FUNC_ELLIPSIS) {
  909. gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, addr);
  910. addr += 8;
  911. }
  912. reg_param_index++;
  913. }
  914. }
  915. /* generate function epilog */
  916. void gfunc_epilog(void)
  917. {
  918. int v, saved_ind;
  919. o(0xc9); /* leave */
  920. if (func_ret_sub == 0) {
  921. o(0xc3); /* ret */
  922. } else {
  923. o(0xc2); /* ret n */
  924. g(func_ret_sub);
  925. g(func_ret_sub >> 8);
  926. }
  927. saved_ind = ind;
  928. ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
  929. /* align local size to word & save local variables */
  930. func_scratch = (func_scratch + 15) & -16;
  931. v = (func_scratch + -loc + 15) & -16;
  932. if (v >= 4096) {
  933. Sym *sym = external_global_sym(TOK___chkstk, &func_old_type, 0);
  934. oad(0xb8, v); /* mov stacksize, %eax */
  935. oad(0xe8, 0); /* call __chkstk, (does the stackframe too) */
  936. greloca(cur_text_section, sym, ind-4, R_X86_64_PC32, -4);
  937. o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
  938. } else {
  939. o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
  940. o(0xec8148); /* sub rsp, stacksize */
  941. gen_le32(v);
  942. }
  943. /* add the "func_scratch" area after each alloca seen */
  944. while (func_alloca) {
  945. unsigned char *ptr = cur_text_section->data + func_alloca;
  946. func_alloca = read32le(ptr);
  947. write32le(ptr, func_scratch);
  948. }
  949. cur_text_section->data_offset = saved_ind;
  950. pe_add_unwind_data(ind, saved_ind, v);
  951. ind = cur_text_section->data_offset;
  952. }
  953. #else
  954. static void gadd_sp(int val)
  955. {
  956. if (val == (char)val) {
  957. o(0xc48348);
  958. g(val);
  959. } else {
  960. oad(0xc48148, val); /* add $xxx, %rsp */
  961. }
  962. }
  963. typedef enum X86_64_Mode {
  964. x86_64_mode_none,
  965. x86_64_mode_memory,
  966. x86_64_mode_integer,
  967. x86_64_mode_sse,
  968. x86_64_mode_x87
  969. } X86_64_Mode;
  970. static X86_64_Mode classify_x86_64_merge(X86_64_Mode a, X86_64_Mode b)
  971. {
  972. if (a == b)
  973. return a;
  974. else if (a == x86_64_mode_none)
  975. return b;
  976. else if (b == x86_64_mode_none)
  977. return a;
  978. else if ((a == x86_64_mode_memory) || (b == x86_64_mode_memory))
  979. return x86_64_mode_memory;
  980. else if ((a == x86_64_mode_integer) || (b == x86_64_mode_integer))
  981. return x86_64_mode_integer;
  982. else if ((a == x86_64_mode_x87) || (b == x86_64_mode_x87))
  983. return x86_64_mode_memory;
  984. else
  985. return x86_64_mode_sse;
  986. }
  987. static X86_64_Mode classify_x86_64_inner(CType *ty)
  988. {
  989. X86_64_Mode mode;
  990. Sym *f;
  991. switch (ty->t & VT_BTYPE) {
  992. case VT_VOID: return x86_64_mode_none;
  993. case VT_INT:
  994. case VT_BYTE:
  995. case VT_SHORT:
  996. case VT_LLONG:
  997. case VT_BOOL:
  998. case VT_PTR:
  999. case VT_FUNC:
  1000. return x86_64_mode_integer;
  1001. case VT_FLOAT:
  1002. case VT_DOUBLE: return x86_64_mode_sse;
  1003. case VT_LDOUBLE: return x86_64_mode_x87;
  1004. case VT_STRUCT:
  1005. f = ty->ref;
  1006. mode = x86_64_mode_none;
  1007. for (f = f->next; f; f = f->next)
  1008. mode = classify_x86_64_merge(mode, classify_x86_64_inner(&f->type));
  1009. return mode;
  1010. }
  1011. assert(0);
  1012. return 0;
  1013. }
  1014. static X86_64_Mode classify_x86_64_arg(CType *ty, CType *ret, int *psize, int *palign, int *reg_count)
  1015. {
  1016. X86_64_Mode mode;
  1017. int size, align, ret_t = 0;
  1018. if (ty->t & (VT_BITFIELD|VT_ARRAY)) {
  1019. *psize = 8;
  1020. *palign = 8;
  1021. *reg_count = 1;
  1022. ret_t = ty->t;
  1023. mode = x86_64_mode_integer;
  1024. } else {
  1025. size = type_size(ty, &align);
  1026. *psize = (size + 7) & ~7;
  1027. *palign = (align + 7) & ~7;
  1028. if (size > 16) {
  1029. mode = x86_64_mode_memory;
  1030. } else {
  1031. mode = classify_x86_64_inner(ty);
  1032. switch (mode) {
  1033. case x86_64_mode_integer:
  1034. if (size > 8) {
  1035. *reg_count = 2;
  1036. ret_t = VT_QLONG;
  1037. } else {
  1038. *reg_count = 1;
  1039. ret_t = (size > 4) ? VT_LLONG : VT_INT;
  1040. }
  1041. break;
  1042. case x86_64_mode_x87:
  1043. *reg_count = 1;
  1044. ret_t = VT_LDOUBLE;
  1045. break;
  1046. case x86_64_mode_sse:
  1047. if (size > 8) {
  1048. *reg_count = 2;
  1049. ret_t = VT_QFLOAT;
  1050. } else {
  1051. *reg_count = 1;
  1052. ret_t = (size > 4) ? VT_DOUBLE : VT_FLOAT;
  1053. }
  1054. break;
  1055. default: break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
  1056. }
  1057. }
  1058. }
  1059. if (ret) {
  1060. ret->ref = NULL;
  1061. ret->t = ret_t;
  1062. }
  1063. return mode;
  1064. }
  1065. ST_FUNC int classify_x86_64_va_arg(CType *ty)
  1066. {
  1067. /* This definition must be synced with stdarg.h */
  1068. enum __va_arg_type {
  1069. __va_gen_reg, __va_float_reg, __va_stack
  1070. };
  1071. int size, align, reg_count;
  1072. X86_64_Mode mode = classify_x86_64_arg(ty, NULL, &size, &align, &reg_count);
  1073. switch (mode) {
  1074. default: return __va_stack;
  1075. case x86_64_mode_integer: return __va_gen_reg;
  1076. case x86_64_mode_sse: return __va_float_reg;
  1077. }
  1078. }
  1079. /* Return the number of registers needed to return the struct, or 0 if
  1080. returning via struct pointer. */
  1081. ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize)
  1082. {
  1083. int size, align, reg_count;
  1084. *ret_align = 1; // Never have to re-align return values for x86-64
  1085. *regsize = 8;
  1086. return (classify_x86_64_arg(vt, ret, &size, &align, &reg_count) != x86_64_mode_memory);
  1087. }
  1088. #define REGN 6
  1089. static const uint8_t arg_regs[REGN] = {
  1090. TREG_RDI, TREG_RSI, TREG_RDX, TREG_RCX, TREG_R8, TREG_R9
  1091. };
  1092. static int arg_prepare_reg(int idx) {
  1093. if (idx == 2 || idx == 3)
  1094. /* idx=2: r10, idx=3: r11 */
  1095. return idx + 8;
  1096. else
  1097. return arg_regs[idx];
  1098. }
  1099. /* Generate function call. The function address is pushed first, then
  1100. all the parameters in call order. This functions pops all the
  1101. parameters and the function address. */
  1102. void gfunc_call(int nb_args)
  1103. {
  1104. X86_64_Mode mode;
  1105. CType type;
  1106. int size, align, r, args_size, stack_adjust, i, reg_count;
  1107. int nb_reg_args = 0;
  1108. int nb_sse_args = 0;
  1109. int sse_reg, gen_reg;
  1110. char _onstack[nb_args], *onstack = _onstack;
  1111. /* calculate the number of integer/float register arguments, remember
  1112. arguments to be passed via stack (in onstack[]), and also remember
  1113. if we have to align the stack pointer to 16 (onstack[i] == 2). Needs
  1114. to be done in a left-to-right pass over arguments. */
  1115. stack_adjust = 0;
  1116. for(i = nb_args - 1; i >= 0; i--) {
  1117. mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
  1118. if (mode == x86_64_mode_sse && nb_sse_args + reg_count <= 8) {
  1119. nb_sse_args += reg_count;
  1120. onstack[i] = 0;
  1121. } else if (mode == x86_64_mode_integer && nb_reg_args + reg_count <= REGN) {
  1122. nb_reg_args += reg_count;
  1123. onstack[i] = 0;
  1124. } else if (mode == x86_64_mode_none) {
  1125. onstack[i] = 0;
  1126. } else {
  1127. if (align == 16 && (stack_adjust &= 15)) {
  1128. onstack[i] = 2;
  1129. stack_adjust = 0;
  1130. } else
  1131. onstack[i] = 1;
  1132. stack_adjust += size;
  1133. }
  1134. }
  1135. if (nb_sse_args && tcc_state->nosse)
  1136. tcc_error("SSE disabled but floating point arguments passed");
  1137. /* fetch cpu flag before generating any code */
  1138. if (vtop >= vstack && (vtop->r & VT_VALMASK) == VT_CMP)
  1139. gv(RC_INT);
  1140. /* for struct arguments, we need to call memcpy and the function
  1141. call breaks register passing arguments we are preparing.
  1142. So, we process arguments which will be passed by stack first. */
  1143. gen_reg = nb_reg_args;
  1144. sse_reg = nb_sse_args;
  1145. args_size = 0;
  1146. stack_adjust &= 15;
  1147. for (i = 0; i < nb_args;) {
  1148. mode = classify_x86_64_arg(&vtop[-i].type, NULL, &size, &align, &reg_count);
  1149. if (!onstack[i]) {
  1150. ++i;
  1151. continue;
  1152. }
  1153. /* Possibly adjust stack to align SSE boundary. We're processing
  1154. args from right to left while allocating happens left to right
  1155. (stack grows down), so the adjustment needs to happen _after_
  1156. an argument that requires it. */
  1157. if (stack_adjust) {
  1158. o(0x50); /* push %rax; aka sub $8,%rsp */
  1159. args_size += 8;
  1160. stack_adjust = 0;
  1161. }
  1162. if (onstack[i] == 2)
  1163. stack_adjust = 1;
  1164. vrotb(i+1);
  1165. switch (vtop->type.t & VT_BTYPE) {
  1166. case VT_STRUCT:
  1167. /* allocate the necessary size on stack */
  1168. o(0x48);
  1169. oad(0xec81, size); /* sub $xxx, %rsp */
  1170. /* generate structure store */
  1171. r = get_reg(RC_INT);
  1172. orex(1, r, 0, 0x89); /* mov %rsp, r */
  1173. o(0xe0 + REG_VALUE(r));
  1174. vset(&vtop->type, r | VT_LVAL, 0);
  1175. vswap();
  1176. vstore();
  1177. break;
  1178. case VT_LDOUBLE:
  1179. gv(RC_ST0);
  1180. oad(0xec8148, size); /* sub $xxx, %rsp */
  1181. o(0x7cdb); /* fstpt 0(%rsp) */
  1182. g(0x24);
  1183. g(0x00);
  1184. break;
  1185. case VT_FLOAT:
  1186. case VT_DOUBLE:
  1187. assert(mode == x86_64_mode_sse);
  1188. r = gv(RC_FLOAT);
  1189. o(0x50); /* push $rax */
  1190. /* movq %xmmN, (%rsp) */
  1191. o(0xd60f66);
  1192. o(0x04 + REG_VALUE(r)*8);
  1193. o(0x24);
  1194. break;
  1195. default:
  1196. assert(mode == x86_64_mode_integer);
  1197. /* simple type */
  1198. /* XXX: implicit cast ? */
  1199. r = gv(RC_INT);
  1200. orex(0,r,0,0x50 + REG_VALUE(r)); /* push r */
  1201. break;
  1202. }
  1203. args_size += size;
  1204. vpop();
  1205. --nb_args;
  1206. onstack++;
  1207. }
  1208. /* XXX This should be superfluous. */
  1209. save_regs(0); /* save used temporary registers */
  1210. /* then, we prepare register passing arguments.
  1211. Note that we cannot set RDX and RCX in this loop because gv()
  1212. may break these temporary registers. Let's use R10 and R11
  1213. instead of them */
  1214. assert(gen_reg <= REGN);
  1215. assert(sse_reg <= 8);
  1216. for(i = 0; i < nb_args; i++) {
  1217. mode = classify_x86_64_arg(&vtop->type, &type, &size, &align, &reg_count);
  1218. /* Alter stack entry type so that gv() knows how to treat it */
  1219. vtop->type = type;
  1220. if (mode == x86_64_mode_sse) {
  1221. if (reg_count == 2) {
  1222. sse_reg -= 2;
  1223. gv(RC_FRET); /* Use pair load into xmm0 & xmm1 */
  1224. if (sse_reg) { /* avoid redundant movaps %xmm0, %xmm0 */
  1225. /* movaps %xmm0, %xmmN */
  1226. o(0x280f);
  1227. o(0xc0 + (sse_reg << 3));
  1228. /* movaps %xmm1, %xmmN */
  1229. o(0x280f);
  1230. o(0xc1 + ((sse_reg+1) << 3));
  1231. }
  1232. } else {
  1233. assert(reg_count == 1);
  1234. --sse_reg;
  1235. /* Load directly to register */
  1236. gv(RC_XMM0 << sse_reg);
  1237. }
  1238. } else if (mode == x86_64_mode_integer) {
  1239. /* simple type */
  1240. /* XXX: implicit cast ? */
  1241. int d;
  1242. gen_reg -= reg_count;
  1243. r = gv(RC_INT);
  1244. d = arg_prepare_reg(gen_reg);
  1245. orex(1,d,r,0x89); /* mov */
  1246. o(0xc0 + REG_VALUE(r) * 8 + REG_VALUE(d));
  1247. if (reg_count == 2) {
  1248. d = arg_prepare_reg(gen_reg+1);
  1249. orex(1,d,vtop->r2,0x89); /* mov */
  1250. o(0xc0 + REG_VALUE(vtop->r2) * 8 + REG_VALUE(d));
  1251. }
  1252. }
  1253. vtop--;
  1254. }
  1255. assert(gen_reg == 0);
  1256. assert(sse_reg == 0);
  1257. /* We shouldn't have many operands on the stack anymore, but the
  1258. call address itself is still there, and it might be in %eax
  1259. (or edx/ecx) currently, which the below writes would clobber.
  1260. So evict all remaining operands here. */
  1261. save_regs(0);
  1262. /* Copy R10 and R11 into RDX and RCX, respectively */
  1263. if (nb_reg_args > 2) {
  1264. o(0xd2894c); /* mov %r10, %rdx */
  1265. if (nb_reg_args > 3) {
  1266. o(0xd9894c); /* mov %r11, %rcx */
  1267. }
  1268. }
  1269. if (vtop->type.ref->f.func_type != FUNC_NEW) /* implies FUNC_OLD or FUNC_ELLIPSIS */
  1270. oad(0xb8, nb_sse_args < 8 ? nb_sse_args : 8); /* mov nb_sse_args, %eax */
  1271. gcall_or_jmp(0);
  1272. if (args_size)
  1273. gadd_sp(args_size);
  1274. vtop--;
  1275. }
  1276. #define FUNC_PROLOG_SIZE 11
  1277. static void push_arg_reg(int i) {
  1278. loc -= 8;
  1279. gen_modrm64(0x89, arg_regs[i], VT_LOCAL, NULL, loc);
  1280. }
  1281. /* generate function prolog of type 't' */
  1282. void gfunc_prolog(CType *func_type)
  1283. {
  1284. X86_64_Mode mode;
  1285. int i, addr, align, size, reg_count;
  1286. int param_addr = 0, reg_param_index, sse_param_index;
  1287. Sym *sym;
  1288. CType *type;
  1289. sym = func_type->ref;
  1290. addr = PTR_SIZE * 2;
  1291. loc = 0;
  1292. ind += FUNC_PROLOG_SIZE;
  1293. func_sub_sp_offset = ind;
  1294. func_ret_sub = 0;
  1295. if (sym->f.func_type == FUNC_ELLIPSIS) {
  1296. int seen_reg_num, seen_sse_num, seen_stack_size;
  1297. seen_reg_num = seen_sse_num = 0;
  1298. /* frame pointer and return address */
  1299. seen_stack_size = PTR_SIZE * 2;
  1300. /* count the number of seen parameters */
  1301. sym = func_type->ref;
  1302. while ((sym = sym->next) != NULL) {
  1303. type = &sym->type;
  1304. mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
  1305. switch (mode) {
  1306. default:
  1307. stack_arg:
  1308. seen_stack_size = ((seen_stack_size + align - 1) & -align) + size;
  1309. break;
  1310. case x86_64_mode_integer:
  1311. if (seen_reg_num + reg_count > REGN)
  1312. goto stack_arg;
  1313. seen_reg_num += reg_count;
  1314. break;
  1315. case x86_64_mode_sse:
  1316. if (seen_sse_num + reg_count > 8)
  1317. goto stack_arg;
  1318. seen_sse_num += reg_count;
  1319. break;
  1320. }
  1321. }
  1322. loc -= 16;
  1323. /* movl $0x????????, -0x10(%rbp) */
  1324. o(0xf045c7);
  1325. gen_le32(seen_reg_num * 8);
  1326. /* movl $0x????????, -0xc(%rbp) */
  1327. o(0xf445c7);
  1328. gen_le32(seen_sse_num * 16 + 48);
  1329. /* movl $0x????????, -0x8(%rbp) */
  1330. o(0xf845c7);
  1331. gen_le32(seen_stack_size);
  1332. /* save all register passing arguments */
  1333. for (i = 0; i < 8; i++) {
  1334. loc -= 16;
  1335. if (!tcc_state->nosse) {
  1336. o(0xd60f66); /* movq */
  1337. gen_modrm(7 - i, VT_LOCAL, NULL, loc);
  1338. }
  1339. /* movq $0, loc+8(%rbp) */
  1340. o(0x85c748);
  1341. gen_le32(loc + 8);
  1342. gen_le32(0);
  1343. }
  1344. for (i = 0; i < REGN; i++) {
  1345. push_arg_reg(REGN-1-i);
  1346. }
  1347. }
  1348. sym = func_type->ref;
  1349. reg_param_index = 0;
  1350. sse_param_index = 0;
  1351. /* if the function returns a structure, then add an
  1352. implicit pointer parameter */
  1353. func_vt = sym->type;
  1354. mode = classify_x86_64_arg(&func_vt, NULL, &size, &align, &reg_count);
  1355. if (mode == x86_64_mode_memory) {
  1356. push_arg_reg(reg_param_index);
  1357. func_vc = loc;
  1358. reg_param_index++;
  1359. }
  1360. /* define parameters */
  1361. while ((sym = sym->next) != NULL) {
  1362. type = &sym->type;
  1363. mode = classify_x86_64_arg(type, NULL, &size, &align, &reg_count);
  1364. switch (mode) {
  1365. case x86_64_mode_sse:
  1366. if (tcc_state->nosse)
  1367. tcc_error("SSE disabled but floating point arguments used");
  1368. if (sse_param_index + reg_count <= 8) {
  1369. /* save arguments passed by register */
  1370. loc -= reg_count * 8;
  1371. param_addr = loc;
  1372. for (i = 0; i < reg_count; ++i) {
  1373. o(0xd60f66); /* movq */
  1374. gen_modrm(sse_param_index, VT_LOCAL, NULL, param_addr + i*8);
  1375. ++sse_param_index;
  1376. }
  1377. } else {
  1378. addr = (addr + align - 1) & -align;
  1379. param_addr = addr;
  1380. addr += size;
  1381. }
  1382. break;
  1383. case x86_64_mode_memory:
  1384. case x86_64_mode_x87:
  1385. addr = (addr + align - 1) & -align;
  1386. param_addr = addr;
  1387. addr += size;
  1388. break;
  1389. case x86_64_mode_integer: {
  1390. if (reg_param_index + reg_count <= REGN) {
  1391. /* save arguments passed by register */
  1392. loc -= reg_count * 8;
  1393. param_addr = loc;
  1394. for (i = 0; i < reg_count; ++i) {
  1395. gen_modrm64(0x89, arg_regs[reg_param_index], VT_LOCAL, NULL, param_addr + i*8);
  1396. ++reg_param_index;
  1397. }
  1398. } else {
  1399. addr = (addr + align - 1) & -align;
  1400. param_addr = addr;
  1401. addr += size;
  1402. }
  1403. break;
  1404. }
  1405. default: break; /* nothing to be done for x86_64_mode_none */
  1406. }
  1407. sym_push(sym->v & ~SYM_FIELD, type,
  1408. VT_LOCAL | lvalue_type(type->t), param_addr);
  1409. }
  1410. #ifdef CONFIG_TCC_BCHECK
  1411. /* leave some room for bound checking code */
  1412. if (tcc_state->do_bounds_check) {
  1413. func_bound_offset = lbounds_section->data_offset;
  1414. func_bound_ind = ind;
  1415. oad(0xb8, 0); /* lbound section pointer */
  1416. o(0xc78948); /* mov %rax,%rdi ## first arg in %rdi, this must be ptr */
  1417. oad(0xb8, 0); /* call to function */
  1418. }
  1419. #endif
  1420. }
  1421. /* generate function epilog */
  1422. void gfunc_epilog(void)
  1423. {
  1424. int v, saved_ind;
  1425. #ifdef CONFIG_TCC_BCHECK
  1426. if (tcc_state->do_bounds_check
  1427. && func_bound_offset != lbounds_section->data_offset)
  1428. {
  1429. addr_t saved_ind;
  1430. addr_t *bounds_ptr;
  1431. Sym *sym_data;
  1432. /* add end of table info */
  1433. bounds_ptr = section_ptr_add(lbounds_section, sizeof(addr_t));
  1434. *bounds_ptr = 0;
  1435. /* generate bound local allocation */
  1436. sym_data = get_sym_ref(&char_pointer_type, lbounds_section,
  1437. func_bound_offset, lbounds_section->data_offset);
  1438. saved_ind = ind;
  1439. ind = func_bound_ind;
  1440. greloca(cur_text_section, sym_data, ind + 1, R_X86_64_64, 0);
  1441. ind = ind + 5 + 3;
  1442. gen_static_call(TOK___bound_local_new);
  1443. ind = saved_ind;
  1444. /* generate bound check local freeing */
  1445. o(0x5250); /* save returned value, if any */
  1446. greloca(cur_text_section, sym_data, ind + 1, R_X86_64_64, 0);
  1447. oad(0xb8, 0); /* mov xxx, %rax */
  1448. o(0xc78948); /* mov %rax,%rdi # first arg in %rdi, this must be ptr */
  1449. gen_static_call(TOK___bound_local_delete);
  1450. o(0x585a); /* restore returned value, if any */
  1451. }
  1452. #endif
  1453. o(0xc9); /* leave */
  1454. if (func_ret_sub == 0) {
  1455. o(0xc3); /* ret */
  1456. } else {
  1457. o(0xc2); /* ret n */
  1458. g(func_ret_sub);
  1459. g(func_ret_sub >> 8);
  1460. }
  1461. /* align local size to word & save local variables */
  1462. v = (-loc + 15) & -16;
  1463. saved_ind = ind;
  1464. ind = func_sub_sp_offset - FUNC_PROLOG_SIZE;
  1465. o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
  1466. o(0xec8148); /* sub rsp, stacksize */
  1467. gen_le32(v);
  1468. ind = saved_ind;
  1469. }
  1470. #endif /* not PE */
  1471. ST_FUNC void gen_fill_nops(int bytes)
  1472. {
  1473. while (bytes--)
  1474. g(0x90);
  1475. }
  1476. /* generate a jump to a label */
  1477. int gjmp(int t)
  1478. {
  1479. return gjmp2(0xe9, t);
  1480. }
  1481. /* generate a jump to a fixed address */
  1482. void gjmp_addr(int a)
  1483. {
  1484. int r;
  1485. r = a - ind - 2;
  1486. if (r == (char)r) {
  1487. g(0xeb);
  1488. g(r);
  1489. } else {
  1490. oad(0xe9, a - ind - 5);
  1491. }
  1492. }
  1493. ST_FUNC void gtst_addr(int inv, int a)
  1494. {
  1495. int v = vtop->r & VT_VALMASK;
  1496. if (v == VT_CMP) {
  1497. inv ^= (vtop--)->c.i;
  1498. a -= ind + 2;
  1499. if (a == (char)a) {
  1500. g(inv - 32);
  1501. g(a);
  1502. } else {
  1503. g(0x0f);
  1504. oad(inv - 16, a - 4);
  1505. }
  1506. } else if ((v & ~1) == VT_JMP) {
  1507. if ((v & 1) != inv) {
  1508. gjmp_addr(a);
  1509. gsym(vtop->c.i);
  1510. } else {
  1511. gsym(vtop->c.i);
  1512. o(0x05eb);
  1513. gjmp_addr(a);
  1514. }
  1515. vtop--;
  1516. }
  1517. }
  1518. /* generate a test. set 'inv' to invert test. Stack entry is popped */
  1519. ST_FUNC int gtst(int inv, int t)
  1520. {
  1521. int v = vtop->r & VT_VALMASK;
  1522. if (nocode_wanted) {
  1523. ;
  1524. } else if (v == VT_CMP) {
  1525. /* fast case : can jump directly since flags are set */
  1526. if (vtop->c.i & 0x100)
  1527. {
  1528. /* This was a float compare. If the parity flag is set
  1529. the result was unordered. For anything except != this
  1530. means false and we don't jump (anding both conditions).
  1531. For != this means true (oring both).
  1532. Take care about inverting the test. We need to jump
  1533. to our target if the result was unordered and test wasn't NE,
  1534. otherwise if unordered we don't want to jump. */
  1535. vtop->c.i &= ~0x100;
  1536. if (inv == (vtop->c.i == TOK_NE))
  1537. o(0x067a); /* jp +6 */
  1538. else
  1539. {
  1540. g(0x0f);
  1541. t = gjmp2(0x8a, t); /* jp t */
  1542. }
  1543. }
  1544. g(0x0f);
  1545. t = gjmp2((vtop->c.i - 16) ^ inv, t);
  1546. } else if (v == VT_JMP || v == VT_JMPI) {
  1547. /* && or || optimization */
  1548. if ((v & 1) == inv) {
  1549. /* insert vtop->c jump list in t */
  1550. uint32_t n1, n = vtop->c.i;
  1551. if (n) {
  1552. while ((n1 = read32le(cur_text_section->data + n)))
  1553. n = n1;
  1554. write32le(cur_text_section->data + n, t);
  1555. t = vtop->c.i;
  1556. }
  1557. } else {
  1558. t = gjmp(t);
  1559. gsym(vtop->c.i);
  1560. }
  1561. }
  1562. vtop--;
  1563. return t;
  1564. }
  1565. /* generate an integer binary operation */
  1566. void gen_opi(int op)
  1567. {
  1568. int r, fr, opc, c;
  1569. int ll, uu, cc;
  1570. ll = is64_type(vtop[-1].type.t);
  1571. uu = (vtop[-1].type.t & VT_UNSIGNED) != 0;
  1572. cc = (vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST;
  1573. switch(op) {
  1574. case '+':
  1575. case TOK_ADDC1: /* add with carry generation */
  1576. opc = 0;
  1577. gen_op8:
  1578. if (cc && (!ll || (int)vtop->c.i == vtop->c.i)) {
  1579. /* constant case */
  1580. vswap();
  1581. r = gv(RC_INT);
  1582. vswap();
  1583. c = vtop->c.i;
  1584. if (c == (char)c) {
  1585. /* XXX: generate inc and dec for smaller code ? */
  1586. orex(ll, r, 0, 0x83);
  1587. o(0xc0 | (opc << 3) | REG_VALUE(r));
  1588. g(c);
  1589. } else {
  1590. orex(ll, r, 0, 0x81);
  1591. oad(0xc0 | (opc << 3) | REG_VALUE(r), c);
  1592. }
  1593. } else {
  1594. gv2(RC_INT, RC_INT);
  1595. r = vtop[-1].r;
  1596. fr = vtop[0].r;
  1597. orex(ll, r, fr, (opc << 3) | 0x01);
  1598. o(0xc0 + REG_VALUE(r) + REG_VALUE(fr) * 8);
  1599. }
  1600. vtop--;
  1601. if (op >= TOK_ULT && op <= TOK_GT) {
  1602. vtop->r = VT_CMP;
  1603. vtop->c.i = op;
  1604. }
  1605. break;
  1606. case '-':
  1607. case TOK_SUBC1: /* sub with carry generation */
  1608. opc = 5;
  1609. goto gen_op8;
  1610. case TOK_ADDC2: /* add with carry use */
  1611. opc = 2;
  1612. goto gen_op8;
  1613. case TOK_SUBC2: /* sub with carry use */
  1614. opc = 3;
  1615. goto gen_op8;
  1616. case '&':
  1617. opc = 4;
  1618. goto gen_op8;
  1619. case '^':
  1620. opc = 6;
  1621. goto gen_op8;
  1622. case '|':
  1623. opc = 1;
  1624. goto gen_op8;
  1625. case '*':
  1626. gv2(RC_INT, RC_INT);
  1627. r = vtop[-1].r;
  1628. fr = vtop[0].r;
  1629. orex(ll, fr, r, 0xaf0f); /* imul fr, r */
  1630. o(0xc0 + REG_VALUE(fr) + REG_VALUE(r) * 8);
  1631. vtop--;
  1632. break;
  1633. case TOK_SHL:
  1634. opc = 4;
  1635. goto gen_shift;
  1636. case TOK_SHR:
  1637. opc = 5;
  1638. goto gen_shift;
  1639. case TOK_SAR:
  1640. opc = 7;
  1641. gen_shift:
  1642. opc = 0xc0 | (opc << 3);
  1643. if (cc) {
  1644. /* constant case */
  1645. vswap();
  1646. r = gv(RC_INT);
  1647. vswap();
  1648. orex(ll, r, 0, 0xc1); /* shl/shr/sar $xxx, r */
  1649. o(opc | REG_VALUE(r));
  1650. g(vtop->c.i & (ll ? 63 : 31));
  1651. } else {
  1652. /* we generate the shift in ecx */
  1653. gv2(RC_INT, RC_RCX);
  1654. r = vtop[-1].r;
  1655. orex(ll, r, 0, 0xd3); /* shl/shr/sar %cl, r */
  1656. o(opc | REG_VALUE(r));
  1657. }
  1658. vtop--;
  1659. break;
  1660. case TOK_UDIV:
  1661. case TOK_UMOD:
  1662. uu = 1;
  1663. goto divmod;
  1664. case '/':
  1665. case '%':
  1666. case TOK_PDIV:
  1667. uu = 0;
  1668. divmod:
  1669. /* first operand must be in eax */
  1670. /* XXX: need better constraint for second operand */
  1671. gv2(RC_RAX, RC_RCX);
  1672. r = vtop[-1].r;
  1673. fr = vtop[0].r;
  1674. vtop--;
  1675. save_reg(TREG_RDX);
  1676. orex(ll, 0, 0, uu ? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
  1677. orex(ll, fr, 0, 0xf7); /* div fr, %eax */
  1678. o((uu ? 0xf0 : 0xf8) + REG_VALUE(fr));
  1679. if (op == '%' || op == TOK_UMOD)
  1680. r = TREG_RDX;
  1681. else
  1682. r = TREG_RAX;
  1683. vtop->r = r;
  1684. break;
  1685. default:
  1686. opc = 7;
  1687. goto gen_op8;
  1688. }
  1689. }
  1690. void gen_opl(int op)
  1691. {
  1692. gen_opi(op);
  1693. }
  1694. /* generate a floating point operation 'v = t1 op t2' instruction. The
  1695. two operands are guaranteed to have the same floating point type */
  1696. /* XXX: need to use ST1 too */
  1697. void gen_opf(int op)
  1698. {
  1699. int a, ft, fc, swapped, r;
  1700. int float_type =
  1701. (vtop->type.t & VT_BTYPE) == VT_LDOUBLE ? RC_ST0 : RC_FLOAT;
  1702. /* convert constants to memory references */
  1703. if ((vtop[-1].r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
  1704. vswap();
  1705. gv(float_type);
  1706. vswap();
  1707. }
  1708. if ((vtop[0].r & (VT_VALMASK | VT_LVAL)) == VT_CONST)
  1709. gv(float_type);
  1710. /* must put at least one value in the floating point register */
  1711. if ((vtop[-1].r & VT_LVAL) &&
  1712. (vtop[0].r & VT_LVAL)) {
  1713. vswap();
  1714. gv(float_type);
  1715. vswap();
  1716. }
  1717. swapped = 0;
  1718. /* swap the stack if needed so that t1 is the register and t2 is
  1719. the memory reference */
  1720. if (vtop[-1].r & VT_LVAL) {
  1721. vswap();
  1722. swapped = 1;
  1723. }
  1724. if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE) {
  1725. if (op >= TOK_ULT && op <= TOK_GT) {
  1726. /* load on stack second operand */
  1727. load(TREG_ST0, vtop);
  1728. save_reg(TREG_RAX); /* eax is used by FP comparison code */
  1729. if (op == TOK_GE || op == TOK_GT)
  1730. swapped = !swapped;
  1731. else if (op == TOK_EQ || op == TOK_NE)
  1732. swapped = 0;
  1733. if (swapped)
  1734. o(0xc9d9); /* fxch %st(1) */
  1735. if (op == TOK_EQ || op == TOK_NE)
  1736. o(0xe9da); /* fucompp */
  1737. else
  1738. o(0xd9de); /* fcompp */
  1739. o(0xe0df); /* fnstsw %ax */
  1740. if (op == TOK_EQ) {
  1741. o(0x45e480); /* and $0x45, %ah */
  1742. o(0x40fC80); /* cmp $0x40, %ah */
  1743. } else if (op == TOK_NE) {
  1744. o(0x45e480); /* and $0x45, %ah */
  1745. o(0x40f480); /* xor $0x40, %ah */
  1746. op = TOK_NE;
  1747. } else if (op == TOK_GE || op == TOK_LE) {
  1748. o(0x05c4f6); /* test $0x05, %ah */
  1749. op = TOK_EQ;
  1750. } else {
  1751. o(0x45c4f6); /* test $0x45, %ah */
  1752. op = TOK_EQ;
  1753. }
  1754. vtop--;
  1755. vtop->r = VT_CMP;
  1756. vtop->c.i = op;
  1757. } else {
  1758. /* no memory reference possible for long double operations */
  1759. load(TREG_ST0, vtop);
  1760. swapped = !swapped;
  1761. switch(op) {
  1762. default:
  1763. case '+':
  1764. a = 0;
  1765. break;
  1766. case '-':
  1767. a = 4;
  1768. if (swapped)
  1769. a++;
  1770. break;
  1771. case '*':
  1772. a = 1;
  1773. break;
  1774. case '/':
  1775. a = 6;
  1776. if (swapped)
  1777. a++;
  1778. break;
  1779. }
  1780. ft = vtop->type.t;
  1781. fc = vtop->c.i;
  1782. o(0xde); /* fxxxp %st, %st(1) */
  1783. o(0xc1 + (a << 3));
  1784. vtop--;
  1785. }
  1786. } else {
  1787. if (op >= TOK_ULT && op <= TOK_GT) {
  1788. /* if saved lvalue, then we must reload it */
  1789. r = vtop->r;
  1790. fc = vtop->c.i;
  1791. if ((r & VT_VALMASK) == VT_LLOCAL) {
  1792. SValue v1;
  1793. r = get_reg(RC_INT);
  1794. v1.type.t = VT_PTR;
  1795. v1.r = VT_LOCAL | VT_LVAL;
  1796. v1.c.i = fc;
  1797. load(r, &v1);
  1798. fc = 0;
  1799. }
  1800. if (op == TOK_EQ || op == TOK_NE) {
  1801. swapped = 0;
  1802. } else {
  1803. if (op == TOK_LE || op == TOK_LT)
  1804. swapped = !swapped;
  1805. if (op == TOK_LE || op == TOK_GE) {
  1806. op = 0x93; /* setae */
  1807. } else {
  1808. op = 0x97; /* seta */
  1809. }
  1810. }
  1811. if (swapped) {
  1812. gv(RC_FLOAT);
  1813. vswap();
  1814. }
  1815. assert(!(vtop[-1].r & VT_LVAL));
  1816. if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE)
  1817. o(0x66);
  1818. if (op == TOK_EQ || op == TOK_NE)
  1819. o(0x2e0f); /* ucomisd */
  1820. else
  1821. o(0x2f0f); /* comisd */
  1822. if (vtop->r & VT_LVAL) {
  1823. gen_modrm(vtop[-1].r, r, vtop->sym, fc);
  1824. } else {
  1825. o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
  1826. }
  1827. vtop--;
  1828. vtop->r = VT_CMP;
  1829. vtop->c.i = op | 0x100;
  1830. } else {
  1831. assert((vtop->type.t & VT_BTYPE) != VT_LDOUBLE);
  1832. switch(op) {
  1833. default:
  1834. case '+':
  1835. a = 0;
  1836. break;
  1837. case '-':
  1838. a = 4;
  1839. break;
  1840. case '*':
  1841. a = 1;
  1842. break;
  1843. case '/':
  1844. a = 6;
  1845. break;
  1846. }
  1847. ft = vtop->type.t;
  1848. fc = vtop->c.i;
  1849. assert((ft & VT_BTYPE) != VT_LDOUBLE);
  1850. r = vtop->r;
  1851. /* if saved lvalue, then we must reload it */
  1852. if ((vtop->r & VT_VALMASK) == VT_LLOCAL) {
  1853. SValue v1;
  1854. r = get_reg(RC_INT);
  1855. v1.type.t = VT_PTR;
  1856. v1.r = VT_LOCAL | VT_LVAL;
  1857. v1.c.i = fc;
  1858. load(r, &v1);
  1859. fc = 0;
  1860. }
  1861. assert(!(vtop[-1].r & VT_LVAL));
  1862. if (swapped) {
  1863. assert(vtop->r & VT_LVAL);
  1864. gv(RC_FLOAT);
  1865. vswap();
  1866. }
  1867. if ((ft & VT_BTYPE) == VT_DOUBLE) {
  1868. o(0xf2);
  1869. } else {
  1870. o(0xf3);
  1871. }
  1872. o(0x0f);
  1873. o(0x58 + a);
  1874. if (vtop->r & VT_LVAL) {
  1875. gen_modrm(vtop[-1].r, r, vtop->sym, fc);
  1876. } else {
  1877. o(0xc0 + REG_VALUE(vtop[0].r) + REG_VALUE(vtop[-1].r)*8);
  1878. }
  1879. vtop--;
  1880. }
  1881. }
  1882. }
  1883. /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
  1884. and 'long long' cases. */
  1885. void gen_cvt_itof(int t)
  1886. {
  1887. if ((t & VT_BTYPE) == VT_LDOUBLE) {
  1888. save_reg(TREG_ST0);
  1889. gv(RC_INT);
  1890. if ((vtop->type.t & VT_BTYPE) == VT_LLONG) {
  1891. /* signed long long to float/double/long double (unsigned case
  1892. is handled generically) */
  1893. o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
  1894. o(0x242cdf); /* fildll (%rsp) */
  1895. o(0x08c48348); /* add $8, %rsp */
  1896. } else if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
  1897. (VT_INT | VT_UNSIGNED)) {
  1898. /* unsigned int to float/double/long double */
  1899. o(0x6a); /* push $0 */
  1900. g(0x00);
  1901. o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
  1902. o(0x242cdf); /* fildll (%rsp) */
  1903. o(0x10c48348); /* add $16, %rsp */
  1904. } else {
  1905. /* int to float/double/long double */
  1906. o(0x50 + (vtop->r & VT_VALMASK)); /* push r */
  1907. o(0x2404db); /* fildl (%rsp) */
  1908. o(0x08c48348); /* add $8, %rsp */
  1909. }
  1910. vtop->r = TREG_ST0;
  1911. } else {
  1912. int r = get_reg(RC_FLOAT);
  1913. gv(RC_INT);
  1914. o(0xf2 + ((t & VT_BTYPE) == VT_FLOAT?1:0));
  1915. if ((vtop->type.t & (VT_BTYPE | VT_UNSIGNED)) ==
  1916. (VT_INT | VT_UNSIGNED) ||
  1917. (vtop->type.t & VT_BTYPE) == VT_LLONG) {
  1918. o(0x48); /* REX */
  1919. }
  1920. o(0x2a0f);
  1921. o(0xc0 + (vtop->r & VT_VALMASK) + REG_VALUE(r)*8); /* cvtsi2sd */
  1922. vtop->r = r;
  1923. }
  1924. }
  1925. /* convert from one floating point type to another */
  1926. void gen_cvt_ftof(int t)
  1927. {
  1928. int ft, bt, tbt;
  1929. ft = vtop->type.t;
  1930. bt = ft & VT_BTYPE;
  1931. tbt = t & VT_BTYPE;
  1932. if (bt == VT_FLOAT) {
  1933. gv(RC_FLOAT);
  1934. if (tbt == VT_DOUBLE) {
  1935. o(0x140f); /* unpcklps */
  1936. o(0xc0 + REG_VALUE(vtop->r)*9);
  1937. o(0x5a0f); /* cvtps2pd */
  1938. o(0xc0 + REG_VALUE(vtop->r)*9);
  1939. } else if (tbt == VT_LDOUBLE) {
  1940. save_reg(RC_ST0);
  1941. /* movss %xmm0,-0x10(%rsp) */
  1942. o(0x110ff3);
  1943. o(0x44 + REG_VALUE(vtop->r)*8);
  1944. o(0xf024);
  1945. o(0xf02444d9); /* flds -0x10(%rsp) */
  1946. vtop->r = TREG_ST0;
  1947. }
  1948. } else if (bt == VT_DOUBLE) {
  1949. gv(RC_FLOAT);
  1950. if (tbt == VT_FLOAT) {
  1951. o(0x140f66); /* unpcklpd */
  1952. o(0xc0 + REG_VALUE(vtop->r)*9);
  1953. o(0x5a0f66); /* cvtpd2ps */
  1954. o(0xc0 + REG_VALUE(vtop->r)*9);
  1955. } else if (tbt == VT_LDOUBLE) {
  1956. save_reg(RC_ST0);
  1957. /* movsd %xmm0,-0x10(%rsp) */
  1958. o(0x110ff2);
  1959. o(0x44 + REG_VALUE(vtop->r)*8);
  1960. o(0xf024);
  1961. o(0xf02444dd); /* fldl -0x10(%rsp) */
  1962. vtop->r = TREG_ST0;
  1963. }
  1964. } else {
  1965. int r;
  1966. gv(RC_ST0);
  1967. r = get_reg(RC_FLOAT);
  1968. if (tbt == VT_DOUBLE) {
  1969. o(0xf0245cdd); /* fstpl -0x10(%rsp) */
  1970. /* movsd -0x10(%rsp),%xmm0 */
  1971. o(0x100ff2);
  1972. o(0x44 + REG_VALUE(r)*8);
  1973. o(0xf024);
  1974. vtop->r = r;
  1975. } else if (tbt == VT_FLOAT) {
  1976. o(0xf0245cd9); /* fstps -0x10(%rsp) */
  1977. /* movss -0x10(%rsp),%xmm0 */
  1978. o(0x100ff3);
  1979. o(0x44 + REG_VALUE(r)*8);
  1980. o(0xf024);
  1981. vtop->r = r;
  1982. }
  1983. }
  1984. }
  1985. /* convert fp to int 't' type */
  1986. void gen_cvt_ftoi(int t)
  1987. {
  1988. int ft, bt, size, r;
  1989. ft = vtop->type.t;
  1990. bt = ft & VT_BTYPE;
  1991. if (bt == VT_LDOUBLE) {
  1992. gen_cvt_ftof(VT_DOUBLE);
  1993. bt = VT_DOUBLE;
  1994. }
  1995. gv(RC_FLOAT);
  1996. if (t != VT_INT)
  1997. size = 8;
  1998. else
  1999. size = 4;
  2000. r = get_reg(RC_INT);
  2001. if (bt == VT_FLOAT) {
  2002. o(0xf3);
  2003. } else if (bt == VT_DOUBLE) {
  2004. o(0xf2);
  2005. } else {
  2006. assert(0);
  2007. }
  2008. orex(size == 8, r, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
  2009. o(0xc0 + REG_VALUE(vtop->r) + REG_VALUE(r)*8);
  2010. vtop->r = r;
  2011. }
  2012. /* computed goto support */
  2013. void ggoto(void)
  2014. {
  2015. gcall_or_jmp(1);
  2016. vtop--;
  2017. }
  2018. /* Save the stack pointer onto the stack and return the location of its address */
  2019. ST_FUNC void gen_vla_sp_save(int addr) {
  2020. /* mov %rsp,addr(%rbp)*/
  2021. gen_modrm64(0x89, TREG_RSP, VT_LOCAL, NULL, addr);
  2022. }
  2023. /* Restore the SP from a location on the stack */
  2024. ST_FUNC void gen_vla_sp_restore(int addr) {
  2025. gen_modrm64(0x8b, TREG_RSP, VT_LOCAL, NULL, addr);
  2026. }
  2027. #ifdef TCC_TARGET_PE
  2028. /* Save result of gen_vla_alloc onto the stack */
  2029. ST_FUNC void gen_vla_result(int addr) {
  2030. /* mov %rax,addr(%rbp)*/
  2031. gen_modrm64(0x89, TREG_RAX, VT_LOCAL, NULL, addr);
  2032. }
  2033. #endif
  2034. /* Subtract from the stack pointer, and push the resulting value onto the stack */
  2035. ST_FUNC void gen_vla_alloc(CType *type, int align) {
  2036. #ifdef TCC_TARGET_PE
  2037. /* alloca does more than just adjust %rsp on Windows */
  2038. vpush_global_sym(&func_old_type, TOK_alloca);
  2039. vswap(); /* Move alloca ref past allocation size */
  2040. gfunc_call(1);
  2041. #else
  2042. int r;
  2043. r = gv(RC_INT); /* allocation size */
  2044. /* sub r,%rsp */
  2045. o(0x2b48);
  2046. o(0xe0 | REG_VALUE(r));
  2047. /* We align to 16 bytes rather than align */
  2048. /* and ~15, %rsp */
  2049. o(0xf0e48348);
  2050. vpop();
  2051. #endif
  2052. }
  2053. /* end of x86-64 code generator */
  2054. /*************************************************************/
  2055. #endif /* ! TARGET_DEFS_ONLY */
  2056. /******************************************************/