i386-tok.h 4.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253
  1. /* ------------------------------------------------------------------ */
  2. /* WARNING: relative order of tokens is important. */
  3. /* register */
  4. DEF_ASM(al)
  5. DEF_ASM(cl)
  6. DEF_ASM(dl)
  7. DEF_ASM(bl)
  8. DEF_ASM(ah)
  9. DEF_ASM(ch)
  10. DEF_ASM(dh)
  11. DEF_ASM(bh)
  12. DEF_ASM(ax)
  13. DEF_ASM(cx)
  14. DEF_ASM(dx)
  15. DEF_ASM(bx)
  16. DEF_ASM(sp)
  17. DEF_ASM(bp)
  18. DEF_ASM(si)
  19. DEF_ASM(di)
  20. DEF_ASM(eax)
  21. DEF_ASM(ecx)
  22. DEF_ASM(edx)
  23. DEF_ASM(ebx)
  24. DEF_ASM(esp)
  25. DEF_ASM(ebp)
  26. DEF_ASM(esi)
  27. DEF_ASM(edi)
  28. #ifdef TCC_TARGET_X86_64
  29. DEF_ASM(rax)
  30. DEF_ASM(rcx)
  31. DEF_ASM(rdx)
  32. DEF_ASM(rbx)
  33. DEF_ASM(rsp)
  34. DEF_ASM(rbp)
  35. DEF_ASM(rsi)
  36. DEF_ASM(rdi)
  37. #endif
  38. DEF_ASM(mm0)
  39. DEF_ASM(mm1)
  40. DEF_ASM(mm2)
  41. DEF_ASM(mm3)
  42. DEF_ASM(mm4)
  43. DEF_ASM(mm5)
  44. DEF_ASM(mm6)
  45. DEF_ASM(mm7)
  46. DEF_ASM(xmm0)
  47. DEF_ASM(xmm1)
  48. DEF_ASM(xmm2)
  49. DEF_ASM(xmm3)
  50. DEF_ASM(xmm4)
  51. DEF_ASM(xmm5)
  52. DEF_ASM(xmm6)
  53. DEF_ASM(xmm7)
  54. DEF_ASM(cr0)
  55. DEF_ASM(cr1)
  56. DEF_ASM(cr2)
  57. DEF_ASM(cr3)
  58. DEF_ASM(cr4)
  59. DEF_ASM(cr5)
  60. DEF_ASM(cr6)
  61. DEF_ASM(cr7)
  62. DEF_ASM(tr0)
  63. DEF_ASM(tr1)
  64. DEF_ASM(tr2)
  65. DEF_ASM(tr3)
  66. DEF_ASM(tr4)
  67. DEF_ASM(tr5)
  68. DEF_ASM(tr6)
  69. DEF_ASM(tr7)
  70. DEF_ASM(db0)
  71. DEF_ASM(db1)
  72. DEF_ASM(db2)
  73. DEF_ASM(db3)
  74. DEF_ASM(db4)
  75. DEF_ASM(db5)
  76. DEF_ASM(db6)
  77. DEF_ASM(db7)
  78. DEF_ASM(dr0)
  79. DEF_ASM(dr1)
  80. DEF_ASM(dr2)
  81. DEF_ASM(dr3)
  82. DEF_ASM(dr4)
  83. DEF_ASM(dr5)
  84. DEF_ASM(dr6)
  85. DEF_ASM(dr7)
  86. DEF_ASM(es)
  87. DEF_ASM(cs)
  88. DEF_ASM(ss)
  89. DEF_ASM(ds)
  90. DEF_ASM(fs)
  91. DEF_ASM(gs)
  92. DEF_ASM(st)
  93. DEF_ASM(rip)
  94. #ifdef TCC_TARGET_X86_64
  95. /* The four low parts of sp/bp/si/di that exist only on
  96. x86-64 (encoding aliased to ah,ch,dh,dh when not using REX). */
  97. DEF_ASM(spl)
  98. DEF_ASM(bpl)
  99. DEF_ASM(sil)
  100. DEF_ASM(dil)
  101. #endif
  102. /* generic two operands */
  103. DEF_BWLX(mov)
  104. DEF_BWLX(add)
  105. DEF_BWLX(or)
  106. DEF_BWLX(adc)
  107. DEF_BWLX(sbb)
  108. DEF_BWLX(and)
  109. DEF_BWLX(sub)
  110. DEF_BWLX(xor)
  111. DEF_BWLX(cmp)
  112. /* unary ops */
  113. DEF_BWLX(inc)
  114. DEF_BWLX(dec)
  115. DEF_BWLX(not)
  116. DEF_BWLX(neg)
  117. DEF_BWLX(mul)
  118. DEF_BWLX(imul)
  119. DEF_BWLX(div)
  120. DEF_BWLX(idiv)
  121. DEF_BWLX(xchg)
  122. DEF_BWLX(test)
  123. /* shifts */
  124. DEF_BWLX(rol)
  125. DEF_BWLX(ror)
  126. DEF_BWLX(rcl)
  127. DEF_BWLX(rcr)
  128. DEF_BWLX(shl)
  129. DEF_BWLX(shr)
  130. DEF_BWLX(sar)
  131. DEF_WLX(shld)
  132. DEF_WLX(shrd)
  133. DEF_ASM(pushw)
  134. DEF_ASM(pushl)
  135. #ifdef TCC_TARGET_X86_64
  136. DEF_ASM(pushq)
  137. #endif
  138. DEF_ASM(push)
  139. DEF_ASM(popw)
  140. DEF_ASM(popl)
  141. #ifdef TCC_TARGET_X86_64
  142. DEF_ASM(popq)
  143. #endif
  144. DEF_ASM(pop)
  145. DEF_BWL(in)
  146. DEF_BWL(out)
  147. DEF_WLX(movzb)
  148. DEF_ASM(movzwl)
  149. DEF_ASM(movsbw)
  150. DEF_ASM(movsbl)
  151. DEF_ASM(movswl)
  152. #ifdef TCC_TARGET_X86_64
  153. DEF_ASM(movsbq)
  154. DEF_ASM(movswq)
  155. DEF_ASM(movzwq)
  156. DEF_ASM(movslq)
  157. #endif
  158. DEF_WLX(lea)
  159. DEF_ASM(les)
  160. DEF_ASM(lds)
  161. DEF_ASM(lss)
  162. DEF_ASM(lfs)
  163. DEF_ASM(lgs)
  164. DEF_ASM(call)
  165. DEF_ASM(jmp)
  166. DEF_ASM(lcall)
  167. DEF_ASM(ljmp)
  168. DEF_ASMTEST(j,)
  169. DEF_ASMTEST(set,)
  170. DEF_ASMTEST(set,b)
  171. DEF_ASMTEST(cmov,)
  172. DEF_WLX(bsf)
  173. DEF_WLX(bsr)
  174. DEF_WLX(bt)
  175. DEF_WLX(bts)
  176. DEF_WLX(btr)
  177. DEF_WLX(btc)
  178. DEF_WLX(lar)
  179. DEF_WLX(lsl)
  180. /* generic FP ops */
  181. DEF_FP(add)
  182. DEF_FP(mul)
  183. DEF_ASM(fcom)
  184. DEF_ASM(fcom_1) /* non existent op, just to have a regular table */
  185. DEF_FP1(com)
  186. DEF_FP(comp)
  187. DEF_FP(sub)
  188. DEF_FP(subr)
  189. DEF_FP(div)
  190. DEF_FP(divr)
  191. DEF_BWLX(xadd)
  192. DEF_BWLX(cmpxchg)
  193. /* string ops */
  194. DEF_BWLX(cmps)
  195. DEF_BWLX(scmp)
  196. DEF_BWL(ins)
  197. DEF_BWL(outs)
  198. DEF_BWLX(lods)
  199. DEF_BWLX(slod)
  200. DEF_BWLX(movs)
  201. DEF_BWLX(smov)
  202. DEF_BWLX(scas)
  203. DEF_BWLX(ssca)
  204. DEF_BWLX(stos)
  205. DEF_BWLX(ssto)
  206. /* generic asm ops */
  207. #define ALT(x)
  208. #define DEF_ASM_OP0(name, opcode) DEF_ASM(name)
  209. #define DEF_ASM_OP0L(name, opcode, group, instr_type)
  210. #define DEF_ASM_OP1(name, opcode, group, instr_type, op0)
  211. #define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1)
  212. #define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2)
  213. #ifdef TCC_TARGET_X86_64
  214. # include "x86_64-asm.h"
  215. #else
  216. # include "i386-asm.h"
  217. #endif
  218. #define ALT(x)
  219. #define DEF_ASM_OP0(name, opcode)
  220. #define DEF_ASM_OP0L(name, opcode, group, instr_type) DEF_ASM(name)
  221. #define DEF_ASM_OP1(name, opcode, group, instr_type, op0) DEF_ASM(name)
  222. #define DEF_ASM_OP2(name, opcode, group, instr_type, op0, op1) DEF_ASM(name)
  223. #define DEF_ASM_OP3(name, opcode, group, instr_type, op0, op1, op2) DEF_ASM(name)
  224. #ifdef TCC_TARGET_X86_64
  225. # include "x86_64-asm.h"
  226. #else
  227. # include "i386-asm.h"
  228. #endif