arm-gen.c 54 KB

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  1. /*
  2. * ARMv4 code generator for TCC
  3. *
  4. * Copyright (c) 2003 Daniel Glöckner
  5. * Copyright (c) 2012 Thomas Preud'homme
  6. *
  7. * Based on i386-gen.c by Fabrice Bellard
  8. *
  9. * This library is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU Lesser General Public
  11. * License as published by the Free Software Foundation; either
  12. * version 2 of the License, or (at your option) any later version.
  13. *
  14. * This library is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * Lesser General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU Lesser General Public
  20. * License along with this library; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #ifdef TARGET_DEFS_ONLY
  24. #if defined(TCC_ARM_EABI) && !defined(TCC_ARM_VFP)
  25. #error "Currently TinyCC only supports float computation with VFP instructions"
  26. #endif
  27. /* number of available registers */
  28. #ifdef TCC_ARM_VFP
  29. #define NB_REGS 13
  30. #else
  31. #define NB_REGS 9
  32. #endif
  33. #ifndef TCC_CPU_VERSION
  34. # define TCC_CPU_VERSION 5
  35. #endif
  36. /* a register can belong to several classes. The classes must be
  37. sorted from more general to more precise (see gv2() code which does
  38. assumptions on it). */
  39. #define RC_INT 0x0001 /* generic integer register */
  40. #define RC_FLOAT 0x0002 /* generic float register */
  41. #define RC_R0 0x0004
  42. #define RC_R1 0x0008
  43. #define RC_R2 0x0010
  44. #define RC_R3 0x0020
  45. #define RC_R12 0x0040
  46. #define RC_F0 0x0080
  47. #define RC_F1 0x0100
  48. #define RC_F2 0x0200
  49. #define RC_F3 0x0400
  50. #ifdef TCC_ARM_VFP
  51. #define RC_F4 0x0800
  52. #define RC_F5 0x1000
  53. #define RC_F6 0x2000
  54. #define RC_F7 0x4000
  55. #endif
  56. #define RC_IRET RC_R0 /* function return: integer register */
  57. #define RC_LRET RC_R1 /* function return: second integer register */
  58. #define RC_FRET RC_F0 /* function return: float register */
  59. /* pretty names for the registers */
  60. enum {
  61. TREG_R0 = 0,
  62. TREG_R1,
  63. TREG_R2,
  64. TREG_R3,
  65. TREG_R12,
  66. TREG_F0,
  67. TREG_F1,
  68. TREG_F2,
  69. TREG_F3,
  70. #ifdef TCC_ARM_VFP
  71. TREG_F4,
  72. TREG_F5,
  73. TREG_F6,
  74. TREG_F7,
  75. #endif
  76. TREG_SP = 13,
  77. TREG_LR,
  78. };
  79. #ifdef TCC_ARM_VFP
  80. #define T2CPR(t) (((t) & VT_BTYPE) != VT_FLOAT ? 0x100 : 0)
  81. #endif
  82. /* return registers for function */
  83. #define REG_IRET TREG_R0 /* single word int return register */
  84. #define REG_LRET TREG_R1 /* second word return register (for long long) */
  85. #define REG_FRET TREG_F0 /* float return register */
  86. #ifdef TCC_ARM_EABI
  87. #define TOK___divdi3 TOK___aeabi_ldivmod
  88. #define TOK___moddi3 TOK___aeabi_ldivmod
  89. #define TOK___udivdi3 TOK___aeabi_uldivmod
  90. #define TOK___umoddi3 TOK___aeabi_uldivmod
  91. #endif
  92. /* defined if function parameters must be evaluated in reverse order */
  93. #define INVERT_FUNC_PARAMS
  94. /* defined if structures are passed as pointers. Otherwise structures
  95. are directly pushed on stack. */
  96. /* #define FUNC_STRUCT_PARAM_AS_PTR */
  97. /* pointer size, in bytes */
  98. #define PTR_SIZE 4
  99. /* long double size and alignment, in bytes */
  100. #ifdef TCC_ARM_VFP
  101. #define LDOUBLE_SIZE 8
  102. #endif
  103. #ifndef LDOUBLE_SIZE
  104. #define LDOUBLE_SIZE 8
  105. #endif
  106. #ifdef TCC_ARM_EABI
  107. #define LDOUBLE_ALIGN 8
  108. #else
  109. #define LDOUBLE_ALIGN 4
  110. #endif
  111. /* maximum alignment (for aligned attribute support) */
  112. #define MAX_ALIGN 8
  113. #define CHAR_IS_UNSIGNED
  114. /******************************************************/
  115. #else /* ! TARGET_DEFS_ONLY */
  116. /******************************************************/
  117. #include "tcc.h"
  118. enum float_abi float_abi;
  119. ST_DATA const int reg_classes[NB_REGS] = {
  120. /* r0 */ RC_INT | RC_R0,
  121. /* r1 */ RC_INT | RC_R1,
  122. /* r2 */ RC_INT | RC_R2,
  123. /* r3 */ RC_INT | RC_R3,
  124. /* r12 */ RC_INT | RC_R12,
  125. /* f0 */ RC_FLOAT | RC_F0,
  126. /* f1 */ RC_FLOAT | RC_F1,
  127. /* f2 */ RC_FLOAT | RC_F2,
  128. /* f3 */ RC_FLOAT | RC_F3,
  129. #ifdef TCC_ARM_VFP
  130. /* d4/s8 */ RC_FLOAT | RC_F4,
  131. /* d5/s10 */ RC_FLOAT | RC_F5,
  132. /* d6/s12 */ RC_FLOAT | RC_F6,
  133. /* d7/s14 */ RC_FLOAT | RC_F7,
  134. #endif
  135. };
  136. static int func_sub_sp_offset, last_itod_magic;
  137. static int leaffunc;
  138. #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
  139. static CType float_type, double_type, func_float_type, func_double_type;
  140. ST_FUNC void arm_init(struct TCCState *s)
  141. {
  142. float_type.t = VT_FLOAT;
  143. double_type.t = VT_DOUBLE;
  144. func_float_type.t = VT_FUNC;
  145. func_float_type.ref = sym_push(SYM_FIELD, &float_type, FUNC_CDECL, FUNC_OLD);
  146. func_double_type.t = VT_FUNC;
  147. func_double_type.ref = sym_push(SYM_FIELD, &double_type, FUNC_CDECL, FUNC_OLD);
  148. float_abi = s->float_abi;
  149. #ifndef TCC_ARM_HARDFLOAT
  150. tcc_warning("soft float ABI currently not supported: default to softfp");
  151. #endif
  152. }
  153. #else
  154. #define func_float_type func_old_type
  155. #define func_double_type func_old_type
  156. #define func_ldouble_type func_old_type
  157. ST_FUNC void arm_init(struct TCCState *s)
  158. {
  159. #if 0
  160. #if !defined (TCC_ARM_VFP)
  161. tcc_warning("Support for FPA is deprecated and will be removed in next"
  162. " release");
  163. #endif
  164. #if !defined (TCC_ARM_EABI)
  165. tcc_warning("Support for OABI is deprecated and will be removed in next"
  166. " release");
  167. #endif
  168. #endif
  169. }
  170. #endif
  171. static int two2mask(int a,int b) {
  172. return (reg_classes[a]|reg_classes[b])&~(RC_INT|RC_FLOAT);
  173. }
  174. static int regmask(int r) {
  175. return reg_classes[r]&~(RC_INT|RC_FLOAT);
  176. }
  177. /******************************************************/
  178. #if defined(TCC_ARM_EABI) && !defined(CONFIG_TCC_ELFINTERP)
  179. const char *default_elfinterp(struct TCCState *s)
  180. {
  181. if (s->float_abi == ARM_HARD_FLOAT)
  182. return "/lib/ld-linux-armhf.so.3";
  183. else
  184. return "/lib/ld-linux.so.3";
  185. }
  186. #endif
  187. void o(uint32_t i)
  188. {
  189. /* this is a good place to start adding big-endian support*/
  190. int ind1;
  191. if (nocode_wanted)
  192. return;
  193. ind1 = ind + 4;
  194. if (!cur_text_section)
  195. tcc_error("compiler error! This happens f.ex. if the compiler\n"
  196. "can't evaluate constant expressions outside of a function.");
  197. if (ind1 > cur_text_section->data_allocated)
  198. section_realloc(cur_text_section, ind1);
  199. cur_text_section->data[ind++] = i&255;
  200. i>>=8;
  201. cur_text_section->data[ind++] = i&255;
  202. i>>=8;
  203. cur_text_section->data[ind++] = i&255;
  204. i>>=8;
  205. cur_text_section->data[ind++] = i;
  206. }
  207. static uint32_t stuff_const(uint32_t op, uint32_t c)
  208. {
  209. int try_neg=0;
  210. uint32_t nc = 0, negop = 0;
  211. switch(op&0x1F00000)
  212. {
  213. case 0x800000: //add
  214. case 0x400000: //sub
  215. try_neg=1;
  216. negop=op^0xC00000;
  217. nc=-c;
  218. break;
  219. case 0x1A00000: //mov
  220. case 0x1E00000: //mvn
  221. try_neg=1;
  222. negop=op^0x400000;
  223. nc=~c;
  224. break;
  225. case 0x200000: //xor
  226. if(c==~0)
  227. return (op&0xF010F000)|((op>>16)&0xF)|0x1E00000;
  228. break;
  229. case 0x0: //and
  230. if(c==~0)
  231. return (op&0xF010F000)|((op>>16)&0xF)|0x1A00000;
  232. case 0x1C00000: //bic
  233. try_neg=1;
  234. negop=op^0x1C00000;
  235. nc=~c;
  236. break;
  237. case 0x1800000: //orr
  238. if(c==~0)
  239. return (op&0xFFF0FFFF)|0x1E00000;
  240. break;
  241. }
  242. do {
  243. uint32_t m;
  244. int i;
  245. if(c<256) /* catch undefined <<32 */
  246. return op|c;
  247. for(i=2;i<32;i+=2) {
  248. m=(0xff>>i)|(0xff<<(32-i));
  249. if(!(c&~m))
  250. return op|(i<<7)|(c<<i)|(c>>(32-i));
  251. }
  252. op=negop;
  253. c=nc;
  254. } while(try_neg--);
  255. return 0;
  256. }
  257. //only add,sub
  258. void stuff_const_harder(uint32_t op, uint32_t v) {
  259. uint32_t x;
  260. x=stuff_const(op,v);
  261. if(x)
  262. o(x);
  263. else {
  264. uint32_t a[16], nv, no, o2, n2;
  265. int i,j,k;
  266. a[0]=0xff;
  267. o2=(op&0xfff0ffff)|((op&0xf000)<<4);;
  268. for(i=1;i<16;i++)
  269. a[i]=(a[i-1]>>2)|(a[i-1]<<30);
  270. for(i=0;i<12;i++)
  271. for(j=i<4?i+12:15;j>=i+4;j--)
  272. if((v&(a[i]|a[j]))==v) {
  273. o(stuff_const(op,v&a[i]));
  274. o(stuff_const(o2,v&a[j]));
  275. return;
  276. }
  277. no=op^0xC00000;
  278. n2=o2^0xC00000;
  279. nv=-v;
  280. for(i=0;i<12;i++)
  281. for(j=i<4?i+12:15;j>=i+4;j--)
  282. if((nv&(a[i]|a[j]))==nv) {
  283. o(stuff_const(no,nv&a[i]));
  284. o(stuff_const(n2,nv&a[j]));
  285. return;
  286. }
  287. for(i=0;i<8;i++)
  288. for(j=i+4;j<12;j++)
  289. for(k=i<4?i+12:15;k>=j+4;k--)
  290. if((v&(a[i]|a[j]|a[k]))==v) {
  291. o(stuff_const(op,v&a[i]));
  292. o(stuff_const(o2,v&a[j]));
  293. o(stuff_const(o2,v&a[k]));
  294. return;
  295. }
  296. no=op^0xC00000;
  297. nv=-v;
  298. for(i=0;i<8;i++)
  299. for(j=i+4;j<12;j++)
  300. for(k=i<4?i+12:15;k>=j+4;k--)
  301. if((nv&(a[i]|a[j]|a[k]))==nv) {
  302. o(stuff_const(no,nv&a[i]));
  303. o(stuff_const(n2,nv&a[j]));
  304. o(stuff_const(n2,nv&a[k]));
  305. return;
  306. }
  307. o(stuff_const(op,v&a[0]));
  308. o(stuff_const(o2,v&a[4]));
  309. o(stuff_const(o2,v&a[8]));
  310. o(stuff_const(o2,v&a[12]));
  311. }
  312. }
  313. uint32_t encbranch(int pos, int addr, int fail)
  314. {
  315. addr-=pos+8;
  316. addr/=4;
  317. if(addr>=0x1000000 || addr<-0x1000000) {
  318. if(fail)
  319. tcc_error("FIXME: function bigger than 32MB");
  320. return 0;
  321. }
  322. return 0x0A000000|(addr&0xffffff);
  323. }
  324. int decbranch(int pos)
  325. {
  326. int x;
  327. x=*(uint32_t *)(cur_text_section->data + pos);
  328. x&=0x00ffffff;
  329. if(x&0x800000)
  330. x-=0x1000000;
  331. return x*4+pos+8;
  332. }
  333. /* output a symbol and patch all calls to it */
  334. void gsym_addr(int t, int a)
  335. {
  336. uint32_t *x;
  337. int lt;
  338. while(t) {
  339. x=(uint32_t *)(cur_text_section->data + t);
  340. t=decbranch(lt=t);
  341. if(a==lt+4)
  342. *x=0xE1A00000; // nop
  343. else {
  344. *x &= 0xff000000;
  345. *x |= encbranch(lt,a,1);
  346. }
  347. }
  348. }
  349. void gsym(int t)
  350. {
  351. gsym_addr(t, ind);
  352. }
  353. #ifdef TCC_ARM_VFP
  354. static uint32_t vfpr(int r)
  355. {
  356. if(r<TREG_F0 || r>TREG_F7)
  357. tcc_error("compiler error! register %i is no vfp register",r);
  358. return r - TREG_F0;
  359. }
  360. #else
  361. static uint32_t fpr(int r)
  362. {
  363. if(r<TREG_F0 || r>TREG_F3)
  364. tcc_error("compiler error! register %i is no fpa register",r);
  365. return r - TREG_F0;
  366. }
  367. #endif
  368. static uint32_t intr(int r)
  369. {
  370. if(r == TREG_R12)
  371. return 12;
  372. if(r >= TREG_R0 && r <= TREG_R3)
  373. return r - TREG_R0;
  374. if (r >= TREG_SP && r <= TREG_LR)
  375. return r + (13 - TREG_SP);
  376. tcc_error("compiler error! register %i is no int register",r);
  377. }
  378. static void calcaddr(uint32_t *base, int *off, int *sgn, int maxoff, unsigned shift)
  379. {
  380. if(*off>maxoff || *off&((1<<shift)-1)) {
  381. uint32_t x, y;
  382. x=0xE280E000;
  383. if(*sgn)
  384. x=0xE240E000;
  385. x|=(*base)<<16;
  386. *base=14; // lr
  387. y=stuff_const(x,*off&~maxoff);
  388. if(y) {
  389. o(y);
  390. *off&=maxoff;
  391. return;
  392. }
  393. y=stuff_const(x,(*off+maxoff)&~maxoff);
  394. if(y) {
  395. o(y);
  396. *sgn=!*sgn;
  397. *off=((*off+maxoff)&~maxoff)-*off;
  398. return;
  399. }
  400. stuff_const_harder(x,*off&~maxoff);
  401. *off&=maxoff;
  402. }
  403. }
  404. static uint32_t mapcc(int cc)
  405. {
  406. switch(cc)
  407. {
  408. case TOK_ULT:
  409. return 0x30000000; /* CC/LO */
  410. case TOK_UGE:
  411. return 0x20000000; /* CS/HS */
  412. case TOK_EQ:
  413. return 0x00000000; /* EQ */
  414. case TOK_NE:
  415. return 0x10000000; /* NE */
  416. case TOK_ULE:
  417. return 0x90000000; /* LS */
  418. case TOK_UGT:
  419. return 0x80000000; /* HI */
  420. case TOK_Nset:
  421. return 0x40000000; /* MI */
  422. case TOK_Nclear:
  423. return 0x50000000; /* PL */
  424. case TOK_LT:
  425. return 0xB0000000; /* LT */
  426. case TOK_GE:
  427. return 0xA0000000; /* GE */
  428. case TOK_LE:
  429. return 0xD0000000; /* LE */
  430. case TOK_GT:
  431. return 0xC0000000; /* GT */
  432. }
  433. tcc_error("unexpected condition code");
  434. return 0xE0000000; /* AL */
  435. }
  436. static int negcc(int cc)
  437. {
  438. switch(cc)
  439. {
  440. case TOK_ULT:
  441. return TOK_UGE;
  442. case TOK_UGE:
  443. return TOK_ULT;
  444. case TOK_EQ:
  445. return TOK_NE;
  446. case TOK_NE:
  447. return TOK_EQ;
  448. case TOK_ULE:
  449. return TOK_UGT;
  450. case TOK_UGT:
  451. return TOK_ULE;
  452. case TOK_Nset:
  453. return TOK_Nclear;
  454. case TOK_Nclear:
  455. return TOK_Nset;
  456. case TOK_LT:
  457. return TOK_GE;
  458. case TOK_GE:
  459. return TOK_LT;
  460. case TOK_LE:
  461. return TOK_GT;
  462. case TOK_GT:
  463. return TOK_LE;
  464. }
  465. tcc_error("unexpected condition code");
  466. return TOK_NE;
  467. }
  468. /* load 'r' from value 'sv' */
  469. void load(int r, SValue *sv)
  470. {
  471. int v, ft, fc, fr, sign;
  472. uint32_t op;
  473. SValue v1;
  474. fr = sv->r;
  475. ft = sv->type.t;
  476. fc = sv->c.i;
  477. if(fc>=0)
  478. sign=0;
  479. else {
  480. sign=1;
  481. fc=-fc;
  482. }
  483. v = fr & VT_VALMASK;
  484. if (fr & VT_LVAL) {
  485. uint32_t base = 0xB; // fp
  486. if(v == VT_LLOCAL) {
  487. v1.type.t = VT_PTR;
  488. v1.r = VT_LOCAL | VT_LVAL;
  489. v1.c.i = sv->c.i;
  490. load(TREG_LR, &v1);
  491. base = 14; /* lr */
  492. fc=sign=0;
  493. v=VT_LOCAL;
  494. } else if(v == VT_CONST) {
  495. v1.type.t = VT_PTR;
  496. v1.r = fr&~VT_LVAL;
  497. v1.c.i = sv->c.i;
  498. v1.sym=sv->sym;
  499. load(TREG_LR, &v1);
  500. base = 14; /* lr */
  501. fc=sign=0;
  502. v=VT_LOCAL;
  503. } else if(v < VT_CONST) {
  504. base=intr(v);
  505. fc=sign=0;
  506. v=VT_LOCAL;
  507. }
  508. if(v == VT_LOCAL) {
  509. if(is_float(ft)) {
  510. calcaddr(&base,&fc,&sign,1020,2);
  511. #ifdef TCC_ARM_VFP
  512. op=0xED100A00; /* flds */
  513. if(!sign)
  514. op|=0x800000;
  515. if ((ft & VT_BTYPE) != VT_FLOAT)
  516. op|=0x100; /* flds -> fldd */
  517. o(op|(vfpr(r)<<12)|(fc>>2)|(base<<16));
  518. #else
  519. op=0xED100100;
  520. if(!sign)
  521. op|=0x800000;
  522. #if LDOUBLE_SIZE == 8
  523. if ((ft & VT_BTYPE) != VT_FLOAT)
  524. op|=0x8000;
  525. #else
  526. if ((ft & VT_BTYPE) == VT_DOUBLE)
  527. op|=0x8000;
  528. else if ((ft & VT_BTYPE) == VT_LDOUBLE)
  529. op|=0x400000;
  530. #endif
  531. o(op|(fpr(r)<<12)|(fc>>2)|(base<<16));
  532. #endif
  533. } else if((ft & (VT_BTYPE|VT_UNSIGNED)) == VT_BYTE
  534. || (ft & VT_BTYPE) == VT_SHORT) {
  535. calcaddr(&base,&fc,&sign,255,0);
  536. op=0xE1500090;
  537. if ((ft & VT_BTYPE) == VT_SHORT)
  538. op|=0x20;
  539. if ((ft & VT_UNSIGNED) == 0)
  540. op|=0x40;
  541. if(!sign)
  542. op|=0x800000;
  543. o(op|(intr(r)<<12)|(base<<16)|((fc&0xf0)<<4)|(fc&0xf));
  544. } else {
  545. calcaddr(&base,&fc,&sign,4095,0);
  546. op=0xE5100000;
  547. if(!sign)
  548. op|=0x800000;
  549. if ((ft & VT_BTYPE) == VT_BYTE || (ft & VT_BTYPE) == VT_BOOL)
  550. op|=0x400000;
  551. o(op|(intr(r)<<12)|fc|(base<<16));
  552. }
  553. return;
  554. }
  555. } else {
  556. if (v == VT_CONST) {
  557. op=stuff_const(0xE3A00000|(intr(r)<<12),sv->c.i);
  558. if (fr & VT_SYM || !op) {
  559. o(0xE59F0000|(intr(r)<<12));
  560. o(0xEA000000);
  561. if(fr & VT_SYM)
  562. greloc(cur_text_section, sv->sym, ind, R_ARM_ABS32);
  563. o(sv->c.i);
  564. } else
  565. o(op);
  566. return;
  567. } else if (v == VT_LOCAL) {
  568. op=stuff_const(0xE28B0000|(intr(r)<<12),sv->c.i);
  569. if (fr & VT_SYM || !op) {
  570. o(0xE59F0000|(intr(r)<<12));
  571. o(0xEA000000);
  572. if(fr & VT_SYM) // needed ?
  573. greloc(cur_text_section, sv->sym, ind, R_ARM_ABS32);
  574. o(sv->c.i);
  575. o(0xE08B0000|(intr(r)<<12)|intr(r));
  576. } else
  577. o(op);
  578. return;
  579. } else if(v == VT_CMP) {
  580. o(mapcc(sv->c.i)|0x3A00001|(intr(r)<<12));
  581. o(mapcc(negcc(sv->c.i))|0x3A00000|(intr(r)<<12));
  582. return;
  583. } else if (v == VT_JMP || v == VT_JMPI) {
  584. int t;
  585. t = v & 1;
  586. o(0xE3A00000|(intr(r)<<12)|t);
  587. o(0xEA000000);
  588. gsym(sv->c.i);
  589. o(0xE3A00000|(intr(r)<<12)|(t^1));
  590. return;
  591. } else if (v < VT_CONST) {
  592. if(is_float(ft))
  593. #ifdef TCC_ARM_VFP
  594. o(0xEEB00A40|(vfpr(r)<<12)|vfpr(v)|T2CPR(ft)); /* fcpyX */
  595. #else
  596. o(0xEE008180|(fpr(r)<<12)|fpr(v));
  597. #endif
  598. else
  599. o(0xE1A00000|(intr(r)<<12)|intr(v));
  600. return;
  601. }
  602. }
  603. tcc_error("load unimplemented!");
  604. }
  605. /* store register 'r' in lvalue 'v' */
  606. void store(int r, SValue *sv)
  607. {
  608. SValue v1;
  609. int v, ft, fc, fr, sign;
  610. uint32_t op;
  611. fr = sv->r;
  612. ft = sv->type.t;
  613. fc = sv->c.i;
  614. if(fc>=0)
  615. sign=0;
  616. else {
  617. sign=1;
  618. fc=-fc;
  619. }
  620. v = fr & VT_VALMASK;
  621. if (fr & VT_LVAL || fr == VT_LOCAL) {
  622. uint32_t base = 0xb; /* fp */
  623. if(v < VT_CONST) {
  624. base=intr(v);
  625. v=VT_LOCAL;
  626. fc=sign=0;
  627. } else if(v == VT_CONST) {
  628. v1.type.t = ft;
  629. v1.r = fr&~VT_LVAL;
  630. v1.c.i = sv->c.i;
  631. v1.sym=sv->sym;
  632. load(TREG_LR, &v1);
  633. base = 14; /* lr */
  634. fc=sign=0;
  635. v=VT_LOCAL;
  636. }
  637. if(v == VT_LOCAL) {
  638. if(is_float(ft)) {
  639. calcaddr(&base,&fc,&sign,1020,2);
  640. #ifdef TCC_ARM_VFP
  641. op=0xED000A00; /* fsts */
  642. if(!sign)
  643. op|=0x800000;
  644. if ((ft & VT_BTYPE) != VT_FLOAT)
  645. op|=0x100; /* fsts -> fstd */
  646. o(op|(vfpr(r)<<12)|(fc>>2)|(base<<16));
  647. #else
  648. op=0xED000100;
  649. if(!sign)
  650. op|=0x800000;
  651. #if LDOUBLE_SIZE == 8
  652. if ((ft & VT_BTYPE) != VT_FLOAT)
  653. op|=0x8000;
  654. #else
  655. if ((ft & VT_BTYPE) == VT_DOUBLE)
  656. op|=0x8000;
  657. if ((ft & VT_BTYPE) == VT_LDOUBLE)
  658. op|=0x400000;
  659. #endif
  660. o(op|(fpr(r)<<12)|(fc>>2)|(base<<16));
  661. #endif
  662. return;
  663. } else if((ft & VT_BTYPE) == VT_SHORT) {
  664. calcaddr(&base,&fc,&sign,255,0);
  665. op=0xE14000B0;
  666. if(!sign)
  667. op|=0x800000;
  668. o(op|(intr(r)<<12)|(base<<16)|((fc&0xf0)<<4)|(fc&0xf));
  669. } else {
  670. calcaddr(&base,&fc,&sign,4095,0);
  671. op=0xE5000000;
  672. if(!sign)
  673. op|=0x800000;
  674. if ((ft & VT_BTYPE) == VT_BYTE || (ft & VT_BTYPE) == VT_BOOL)
  675. op|=0x400000;
  676. o(op|(intr(r)<<12)|fc|(base<<16));
  677. }
  678. return;
  679. }
  680. }
  681. tcc_error("store unimplemented");
  682. }
  683. static void gadd_sp(int val)
  684. {
  685. stuff_const_harder(0xE28DD000,val);
  686. }
  687. /* 'is_jmp' is '1' if it is a jump */
  688. static void gcall_or_jmp(int is_jmp)
  689. {
  690. int r;
  691. if ((vtop->r & (VT_VALMASK | VT_LVAL)) == VT_CONST) {
  692. uint32_t x;
  693. /* constant case */
  694. x=encbranch(ind,ind+vtop->c.i,0);
  695. if(x) {
  696. if (vtop->r & VT_SYM) {
  697. /* relocation case */
  698. greloc(cur_text_section, vtop->sym, ind, R_ARM_PC24);
  699. } else
  700. put_elf_reloc(symtab_section, cur_text_section, ind, R_ARM_PC24, 0);
  701. o(x|(is_jmp?0xE0000000:0xE1000000));
  702. } else {
  703. if(!is_jmp)
  704. o(0xE28FE004); // add lr,pc,#4
  705. o(0xE51FF004); // ldr pc,[pc,#-4]
  706. if (vtop->r & VT_SYM)
  707. greloc(cur_text_section, vtop->sym, ind, R_ARM_ABS32);
  708. o(vtop->c.i);
  709. }
  710. } else {
  711. /* otherwise, indirect call */
  712. r = gv(RC_INT);
  713. if(!is_jmp)
  714. o(0xE1A0E00F); // mov lr,pc
  715. o(0xE1A0F000|intr(r)); // mov pc,r
  716. }
  717. }
  718. static int unalias_ldbl(int btype)
  719. {
  720. #if LDOUBLE_SIZE == 8
  721. if (btype == VT_LDOUBLE)
  722. btype = VT_DOUBLE;
  723. #endif
  724. return btype;
  725. }
  726. /* Return whether a structure is an homogeneous float aggregate or not.
  727. The answer is true if all the elements of the structure are of the same
  728. primitive float type and there is less than 4 elements.
  729. type: the type corresponding to the structure to be tested */
  730. static int is_hgen_float_aggr(CType *type)
  731. {
  732. if ((type->t & VT_BTYPE) == VT_STRUCT) {
  733. struct Sym *ref;
  734. int btype, nb_fields = 0;
  735. ref = type->ref->next;
  736. btype = unalias_ldbl(ref->type.t & VT_BTYPE);
  737. if (btype == VT_FLOAT || btype == VT_DOUBLE) {
  738. for(; ref && btype == unalias_ldbl(ref->type.t & VT_BTYPE); ref = ref->next, nb_fields++);
  739. return !ref && nb_fields <= 4;
  740. }
  741. }
  742. return 0;
  743. }
  744. struct avail_regs {
  745. signed char avail[3]; /* 3 holes max with only float and double alignments */
  746. int first_hole; /* first available hole */
  747. int last_hole; /* last available hole (none if equal to first_hole) */
  748. int first_free_reg; /* next free register in the sequence, hole excluded */
  749. };
  750. #define AVAIL_REGS_INITIALIZER (struct avail_regs) { { 0, 0, 0}, 0, 0, 0 }
  751. /* Find suitable registers for a VFP Co-Processor Register Candidate (VFP CPRC
  752. param) according to the rules described in the procedure call standard for
  753. the ARM architecture (AAPCS). If found, the registers are assigned to this
  754. VFP CPRC parameter. Registers are allocated in sequence unless a hole exists
  755. and the parameter is a single float.
  756. avregs: opaque structure to keep track of available VFP co-processor regs
  757. align: alignment constraints for the param, as returned by type_size()
  758. size: size of the parameter, as returned by type_size() */
  759. int assign_vfpreg(struct avail_regs *avregs, int align, int size)
  760. {
  761. int first_reg = 0;
  762. if (avregs->first_free_reg == -1)
  763. return -1;
  764. if (align >> 3) { /* double alignment */
  765. first_reg = avregs->first_free_reg;
  766. /* alignment constraint not respected so use next reg and record hole */
  767. if (first_reg & 1)
  768. avregs->avail[avregs->last_hole++] = first_reg++;
  769. } else { /* no special alignment (float or array of float) */
  770. /* if single float and a hole is available, assign the param to it */
  771. if (size == 4 && avregs->first_hole != avregs->last_hole)
  772. return avregs->avail[avregs->first_hole++];
  773. else
  774. first_reg = avregs->first_free_reg;
  775. }
  776. if (first_reg + size / 4 <= 16) {
  777. avregs->first_free_reg = first_reg + size / 4;
  778. return first_reg;
  779. }
  780. avregs->first_free_reg = -1;
  781. return -1;
  782. }
  783. /* Returns whether all params need to be passed in core registers or not.
  784. This is the case for function part of the runtime ABI. */
  785. int floats_in_core_regs(SValue *sval)
  786. {
  787. if (!sval->sym)
  788. return 0;
  789. switch (sval->sym->v) {
  790. case TOK___floatundisf:
  791. case TOK___floatundidf:
  792. case TOK___fixunssfdi:
  793. case TOK___fixunsdfdi:
  794. #ifndef TCC_ARM_VFP
  795. case TOK___fixunsxfdi:
  796. #endif
  797. case TOK___floatdisf:
  798. case TOK___floatdidf:
  799. case TOK___fixsfdi:
  800. case TOK___fixdfdi:
  801. return 1;
  802. default:
  803. return 0;
  804. }
  805. }
  806. /* Return the number of registers needed to return the struct, or 0 if
  807. returning via struct pointer. */
  808. ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize) {
  809. #ifdef TCC_ARM_EABI
  810. int size, align;
  811. size = type_size(vt, &align);
  812. if (float_abi == ARM_HARD_FLOAT && !variadic &&
  813. (is_float(vt->t) || is_hgen_float_aggr(vt))) {
  814. *ret_align = 8;
  815. *regsize = 8;
  816. ret->ref = NULL;
  817. ret->t = VT_DOUBLE;
  818. return (size + 7) >> 3;
  819. } else if (size <= 4) {
  820. *ret_align = 4;
  821. *regsize = 4;
  822. ret->ref = NULL;
  823. ret->t = VT_INT;
  824. return 1;
  825. } else
  826. return 0;
  827. #else
  828. return 0;
  829. #endif
  830. }
  831. /* Parameters are classified according to how they are copied to their final
  832. destination for the function call. Because the copying is performed class
  833. after class according to the order in the union below, it is important that
  834. some constraints about the order of the members of this union are respected:
  835. - CORE_STRUCT_CLASS must come after STACK_CLASS;
  836. - CORE_CLASS must come after STACK_CLASS, CORE_STRUCT_CLASS and
  837. VFP_STRUCT_CLASS;
  838. - VFP_STRUCT_CLASS must come after VFP_CLASS.
  839. See the comment for the main loop in copy_params() for the reason. */
  840. enum reg_class {
  841. STACK_CLASS = 0,
  842. CORE_STRUCT_CLASS,
  843. VFP_CLASS,
  844. VFP_STRUCT_CLASS,
  845. CORE_CLASS,
  846. NB_CLASSES
  847. };
  848. struct param_plan {
  849. int start; /* first reg or addr used depending on the class */
  850. int end; /* last reg used or next free addr depending on the class */
  851. SValue *sval; /* pointer to SValue on the value stack */
  852. struct param_plan *prev; /* previous element in this class */
  853. };
  854. struct plan {
  855. struct param_plan *pplans; /* array of all the param plans */
  856. struct param_plan *clsplans[NB_CLASSES]; /* per class lists of param plans */
  857. };
  858. #define add_param_plan(plan,pplan,class) \
  859. do { \
  860. pplan.prev = plan->clsplans[class]; \
  861. plan->pplans[plan ## _nb] = pplan; \
  862. plan->clsplans[class] = &plan->pplans[plan ## _nb++]; \
  863. } while(0)
  864. /* Assign parameters to registers and stack with alignment according to the
  865. rules in the procedure call standard for the ARM architecture (AAPCS).
  866. The overall assignment is recorded in an array of per parameter structures
  867. called parameter plans. The parameter plans are also further organized in a
  868. number of linked lists, one per class of parameter (see the comment for the
  869. definition of union reg_class).
  870. nb_args: number of parameters of the function for which a call is generated
  871. float_abi: float ABI in use for this function call
  872. plan: the structure where the overall assignment is recorded
  873. todo: a bitmap that record which core registers hold a parameter
  874. Returns the amount of stack space needed for parameter passing
  875. Note: this function allocated an array in plan->pplans with tcc_malloc. It
  876. is the responsibility of the caller to free this array once used (ie not
  877. before copy_params). */
  878. static int assign_regs(int nb_args, int float_abi, struct plan *plan, int *todo)
  879. {
  880. int i, size, align;
  881. int ncrn /* next core register number */, nsaa /* next stacked argument address*/;
  882. int plan_nb = 0;
  883. struct param_plan pplan;
  884. struct avail_regs avregs = AVAIL_REGS_INITIALIZER;
  885. ncrn = nsaa = 0;
  886. *todo = 0;
  887. plan->pplans = tcc_malloc(nb_args * sizeof(*plan->pplans));
  888. memset(plan->clsplans, 0, sizeof(plan->clsplans));
  889. for(i = nb_args; i-- ;) {
  890. int j, start_vfpreg = 0;
  891. CType type = vtop[-i].type;
  892. type.t &= ~VT_ARRAY;
  893. size = type_size(&type, &align);
  894. size = (size + 3) & ~3;
  895. align = (align + 3) & ~3;
  896. switch(vtop[-i].type.t & VT_BTYPE) {
  897. case VT_STRUCT:
  898. case VT_FLOAT:
  899. case VT_DOUBLE:
  900. case VT_LDOUBLE:
  901. if (float_abi == ARM_HARD_FLOAT) {
  902. int is_hfa = 0; /* Homogeneous float aggregate */
  903. if (is_float(vtop[-i].type.t)
  904. || (is_hfa = is_hgen_float_aggr(&vtop[-i].type))) {
  905. int end_vfpreg;
  906. start_vfpreg = assign_vfpreg(&avregs, align, size);
  907. end_vfpreg = start_vfpreg + ((size - 1) >> 2);
  908. if (start_vfpreg >= 0) {
  909. pplan = (struct param_plan) {start_vfpreg, end_vfpreg, &vtop[-i]};
  910. if (is_hfa)
  911. add_param_plan(plan, pplan, VFP_STRUCT_CLASS);
  912. else
  913. add_param_plan(plan, pplan, VFP_CLASS);
  914. continue;
  915. } else
  916. break;
  917. }
  918. }
  919. ncrn = (ncrn + (align-1)/4) & ~((align/4) - 1);
  920. if (ncrn + size/4 <= 4 || (ncrn < 4 && start_vfpreg != -1)) {
  921. /* The parameter is allocated both in core register and on stack. As
  922. * such, it can be of either class: it would either be the last of
  923. * CORE_STRUCT_CLASS or the first of STACK_CLASS. */
  924. for (j = ncrn; j < 4 && j < ncrn + size / 4; j++)
  925. *todo|=(1<<j);
  926. pplan = (struct param_plan) {ncrn, j, &vtop[-i]};
  927. add_param_plan(plan, pplan, CORE_STRUCT_CLASS);
  928. ncrn += size/4;
  929. if (ncrn > 4)
  930. nsaa = (ncrn - 4) * 4;
  931. } else {
  932. ncrn = 4;
  933. break;
  934. }
  935. continue;
  936. default:
  937. if (ncrn < 4) {
  938. int is_long = (vtop[-i].type.t & VT_BTYPE) == VT_LLONG;
  939. if (is_long) {
  940. ncrn = (ncrn + 1) & -2;
  941. if (ncrn == 4)
  942. break;
  943. }
  944. pplan = (struct param_plan) {ncrn, ncrn, &vtop[-i]};
  945. ncrn++;
  946. if (is_long)
  947. pplan.end = ncrn++;
  948. add_param_plan(plan, pplan, CORE_CLASS);
  949. continue;
  950. }
  951. }
  952. nsaa = (nsaa + (align - 1)) & ~(align - 1);
  953. pplan = (struct param_plan) {nsaa, nsaa + size, &vtop[-i]};
  954. add_param_plan(plan, pplan, STACK_CLASS);
  955. nsaa += size; /* size already rounded up before */
  956. }
  957. return nsaa;
  958. }
  959. #undef add_param_plan
  960. /* Copy parameters to their final destination (core reg, VFP reg or stack) for
  961. function call.
  962. nb_args: number of parameters the function take
  963. plan: the overall assignment plan for parameters
  964. todo: a bitmap indicating what core reg will hold a parameter
  965. Returns the number of SValue added by this function on the value stack */
  966. static int copy_params(int nb_args, struct plan *plan, int todo)
  967. {
  968. int size, align, r, i, nb_extra_sval = 0;
  969. struct param_plan *pplan;
  970. int pass = 0;
  971. /* Several constraints require parameters to be copied in a specific order:
  972. - structures are copied to the stack before being loaded in a reg;
  973. - floats loaded to an odd numbered VFP reg are first copied to the
  974. preceding even numbered VFP reg and then moved to the next VFP reg.
  975. It is thus important that:
  976. - structures assigned to core regs must be copied after parameters
  977. assigned to the stack but before structures assigned to VFP regs because
  978. a structure can lie partly in core registers and partly on the stack;
  979. - parameters assigned to the stack and all structures be copied before
  980. parameters assigned to a core reg since copying a parameter to the stack
  981. require using a core reg;
  982. - parameters assigned to VFP regs be copied before structures assigned to
  983. VFP regs as the copy might use an even numbered VFP reg that already
  984. holds part of a structure. */
  985. again:
  986. for(i = 0; i < NB_CLASSES; i++) {
  987. for(pplan = plan->clsplans[i]; pplan; pplan = pplan->prev) {
  988. if (pass
  989. && (i != CORE_CLASS || pplan->sval->r < VT_CONST))
  990. continue;
  991. vpushv(pplan->sval);
  992. pplan->sval->r = pplan->sval->r2 = VT_CONST; /* disable entry */
  993. switch(i) {
  994. case STACK_CLASS:
  995. case CORE_STRUCT_CLASS:
  996. case VFP_STRUCT_CLASS:
  997. if ((pplan->sval->type.t & VT_BTYPE) == VT_STRUCT) {
  998. int padding = 0;
  999. size = type_size(&pplan->sval->type, &align);
  1000. /* align to stack align size */
  1001. size = (size + 3) & ~3;
  1002. if (i == STACK_CLASS && pplan->prev)
  1003. padding = pplan->start - pplan->prev->end;
  1004. size += padding; /* Add padding if any */
  1005. /* allocate the necessary size on stack */
  1006. gadd_sp(-size);
  1007. /* generate structure store */
  1008. r = get_reg(RC_INT);
  1009. o(0xE28D0000|(intr(r)<<12)|padding); /* add r, sp, padding */
  1010. vset(&vtop->type, r | VT_LVAL, 0);
  1011. vswap();
  1012. vstore(); /* memcpy to current sp + potential padding */
  1013. /* Homogeneous float aggregate are loaded to VFP registers
  1014. immediately since there is no way of loading data in multiple
  1015. non consecutive VFP registers as what is done for other
  1016. structures (see the use of todo). */
  1017. if (i == VFP_STRUCT_CLASS) {
  1018. int first = pplan->start, nb = pplan->end - first + 1;
  1019. /* vpop.32 {pplan->start, ..., pplan->end} */
  1020. o(0xECBD0A00|(first&1)<<22|(first>>1)<<12|nb);
  1021. /* No need to write the register used to a SValue since VFP regs
  1022. cannot be used for gcall_or_jmp */
  1023. }
  1024. } else {
  1025. if (is_float(pplan->sval->type.t)) {
  1026. #ifdef TCC_ARM_VFP
  1027. r = vfpr(gv(RC_FLOAT)) << 12;
  1028. if ((pplan->sval->type.t & VT_BTYPE) == VT_FLOAT)
  1029. size = 4;
  1030. else {
  1031. size = 8;
  1032. r |= 0x101; /* vpush.32 -> vpush.64 */
  1033. }
  1034. o(0xED2D0A01 + r); /* vpush */
  1035. #else
  1036. r = fpr(gv(RC_FLOAT)) << 12;
  1037. if ((pplan->sval->type.t & VT_BTYPE) == VT_FLOAT)
  1038. size = 4;
  1039. else if ((pplan->sval->type.t & VT_BTYPE) == VT_DOUBLE)
  1040. size = 8;
  1041. else
  1042. size = LDOUBLE_SIZE;
  1043. if (size == 12)
  1044. r |= 0x400000;
  1045. else if(size == 8)
  1046. r|=0x8000;
  1047. o(0xED2D0100|r|(size>>2)); /* some kind of vpush for FPA */
  1048. #endif
  1049. } else {
  1050. /* simple type (currently always same size) */
  1051. /* XXX: implicit cast ? */
  1052. size=4;
  1053. if ((pplan->sval->type.t & VT_BTYPE) == VT_LLONG) {
  1054. lexpand_nr();
  1055. size = 8;
  1056. r = gv(RC_INT);
  1057. o(0xE52D0004|(intr(r)<<12)); /* push r */
  1058. vtop--;
  1059. }
  1060. r = gv(RC_INT);
  1061. o(0xE52D0004|(intr(r)<<12)); /* push r */
  1062. }
  1063. if (i == STACK_CLASS && pplan->prev)
  1064. gadd_sp(pplan->prev->end - pplan->start); /* Add padding if any */
  1065. }
  1066. break;
  1067. case VFP_CLASS:
  1068. gv(regmask(TREG_F0 + (pplan->start >> 1)));
  1069. if (pplan->start & 1) { /* Must be in upper part of double register */
  1070. o(0xEEF00A40|((pplan->start>>1)<<12)|(pplan->start>>1)); /* vmov.f32 s(n+1), sn */
  1071. vtop->r = VT_CONST; /* avoid being saved on stack by gv for next float */
  1072. }
  1073. break;
  1074. case CORE_CLASS:
  1075. if ((pplan->sval->type.t & VT_BTYPE) == VT_LLONG) {
  1076. lexpand_nr();
  1077. gv(regmask(pplan->end));
  1078. pplan->sval->r2 = vtop->r;
  1079. vtop--;
  1080. }
  1081. gv(regmask(pplan->start));
  1082. /* Mark register as used so that gcall_or_jmp use another one
  1083. (regs >=4 are free as never used to pass parameters) */
  1084. pplan->sval->r = vtop->r;
  1085. break;
  1086. }
  1087. vtop--;
  1088. }
  1089. }
  1090. /* second pass to restore registers that were saved on stack by accident.
  1091. Maybe redundant after the "lvalue_save" patch in tccgen.c:gv() */
  1092. if (++pass < 2)
  1093. goto again;
  1094. /* Manually free remaining registers since next parameters are loaded
  1095. * manually, without the help of gv(int). */
  1096. save_regs(nb_args);
  1097. if(todo) {
  1098. o(0xE8BD0000|todo); /* pop {todo} */
  1099. for(pplan = plan->clsplans[CORE_STRUCT_CLASS]; pplan; pplan = pplan->prev) {
  1100. int r;
  1101. pplan->sval->r = pplan->start;
  1102. /* An SValue can only pin 2 registers at best (r and r2) but a structure
  1103. can occupy more than 2 registers. Thus, we need to push on the value
  1104. stack some fake parameter to have on SValue for each registers used
  1105. by a structure (r2 is not used). */
  1106. for (r = pplan->start + 1; r <= pplan->end; r++) {
  1107. if (todo & (1 << r)) {
  1108. nb_extra_sval++;
  1109. vpushi(0);
  1110. vtop->r = r;
  1111. }
  1112. }
  1113. }
  1114. }
  1115. return nb_extra_sval;
  1116. }
  1117. /* Generate function call. The function address is pushed first, then
  1118. all the parameters in call order. This functions pops all the
  1119. parameters and the function address. */
  1120. void gfunc_call(int nb_args)
  1121. {
  1122. int r, args_size;
  1123. int def_float_abi = float_abi;
  1124. int todo;
  1125. struct plan plan;
  1126. #ifdef TCC_ARM_EABI
  1127. int variadic;
  1128. if (float_abi == ARM_HARD_FLOAT) {
  1129. variadic = (vtop[-nb_args].type.ref->f.func_type == FUNC_ELLIPSIS);
  1130. if (variadic || floats_in_core_regs(&vtop[-nb_args]))
  1131. float_abi = ARM_SOFTFP_FLOAT;
  1132. }
  1133. #endif
  1134. /* cannot let cpu flags if other instruction are generated. Also avoid leaving
  1135. VT_JMP anywhere except on the top of the stack because it would complicate
  1136. the code generator. */
  1137. r = vtop->r & VT_VALMASK;
  1138. if (r == VT_CMP || (r & ~1) == VT_JMP)
  1139. gv(RC_INT);
  1140. args_size = assign_regs(nb_args, float_abi, &plan, &todo);
  1141. #ifdef TCC_ARM_EABI
  1142. if (args_size & 7) { /* Stack must be 8 byte aligned at fct call for EABI */
  1143. args_size = (args_size + 7) & ~7;
  1144. o(0xE24DD004); /* sub sp, sp, #4 */
  1145. }
  1146. #endif
  1147. nb_args += copy_params(nb_args, &plan, todo);
  1148. tcc_free(plan.pplans);
  1149. /* Move fct SValue on top as required by gcall_or_jmp */
  1150. vrotb(nb_args + 1);
  1151. gcall_or_jmp(0);
  1152. if (args_size)
  1153. gadd_sp(args_size); /* pop all parameters passed on the stack */
  1154. #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
  1155. if(float_abi == ARM_SOFTFP_FLOAT && is_float(vtop->type.ref->type.t)) {
  1156. if((vtop->type.ref->type.t & VT_BTYPE) == VT_FLOAT) {
  1157. o(0xEE000A10); /*vmov s0, r0 */
  1158. } else {
  1159. o(0xEE000B10); /* vmov.32 d0[0], r0 */
  1160. o(0xEE201B10); /* vmov.32 d0[1], r1 */
  1161. }
  1162. }
  1163. #endif
  1164. vtop -= nb_args + 1; /* Pop all params and fct address from value stack */
  1165. leaffunc = 0; /* we are calling a function, so we aren't in a leaf function */
  1166. float_abi = def_float_abi;
  1167. }
  1168. /* generate function prolog of type 't' */
  1169. void gfunc_prolog(CType *func_type)
  1170. {
  1171. Sym *sym,*sym2;
  1172. int n, nf, size, align, rs, struct_ret = 0;
  1173. int addr, pn, sn; /* pn=core, sn=stack */
  1174. CType ret_type;
  1175. #ifdef TCC_ARM_EABI
  1176. struct avail_regs avregs = AVAIL_REGS_INITIALIZER;
  1177. #endif
  1178. sym = func_type->ref;
  1179. func_vt = sym->type;
  1180. func_var = (func_type->ref->f.func_type == FUNC_ELLIPSIS);
  1181. n = nf = 0;
  1182. if ((func_vt.t & VT_BTYPE) == VT_STRUCT &&
  1183. !gfunc_sret(&func_vt, func_var, &ret_type, &align, &rs))
  1184. {
  1185. n++;
  1186. struct_ret = 1;
  1187. func_vc = 12; /* Offset from fp of the place to store the result */
  1188. }
  1189. for(sym2 = sym->next; sym2 && (n < 4 || nf < 16); sym2 = sym2->next) {
  1190. size = type_size(&sym2->type, &align);
  1191. #ifdef TCC_ARM_EABI
  1192. if (float_abi == ARM_HARD_FLOAT && !func_var &&
  1193. (is_float(sym2->type.t) || is_hgen_float_aggr(&sym2->type))) {
  1194. int tmpnf = assign_vfpreg(&avregs, align, size);
  1195. tmpnf += (size + 3) / 4;
  1196. nf = (tmpnf > nf) ? tmpnf : nf;
  1197. } else
  1198. #endif
  1199. if (n < 4)
  1200. n += (size + 3) / 4;
  1201. }
  1202. o(0xE1A0C00D); /* mov ip,sp */
  1203. if (func_var)
  1204. n=4;
  1205. if (n) {
  1206. if(n>4)
  1207. n=4;
  1208. #ifdef TCC_ARM_EABI
  1209. n=(n+1)&-2;
  1210. #endif
  1211. o(0xE92D0000|((1<<n)-1)); /* save r0-r4 on stack if needed */
  1212. }
  1213. if (nf) {
  1214. if (nf>16)
  1215. nf=16;
  1216. nf=(nf+1)&-2; /* nf => HARDFLOAT => EABI */
  1217. o(0xED2D0A00|nf); /* save s0-s15 on stack if needed */
  1218. }
  1219. o(0xE92D5800); /* save fp, ip, lr */
  1220. o(0xE1A0B00D); /* mov fp, sp */
  1221. func_sub_sp_offset = ind;
  1222. o(0xE1A00000); /* nop, leave space for stack adjustment in epilog */
  1223. #ifdef TCC_ARM_EABI
  1224. if (float_abi == ARM_HARD_FLOAT) {
  1225. func_vc += nf * 4;
  1226. avregs = AVAIL_REGS_INITIALIZER;
  1227. }
  1228. #endif
  1229. pn = struct_ret, sn = 0;
  1230. while ((sym = sym->next)) {
  1231. CType *type;
  1232. type = &sym->type;
  1233. size = type_size(type, &align);
  1234. size = (size + 3) >> 2;
  1235. align = (align + 3) & ~3;
  1236. #ifdef TCC_ARM_EABI
  1237. if (float_abi == ARM_HARD_FLOAT && !func_var && (is_float(sym->type.t)
  1238. || is_hgen_float_aggr(&sym->type))) {
  1239. int fpn = assign_vfpreg(&avregs, align, size << 2);
  1240. if (fpn >= 0)
  1241. addr = fpn * 4;
  1242. else
  1243. goto from_stack;
  1244. } else
  1245. #endif
  1246. if (pn < 4) {
  1247. #ifdef TCC_ARM_EABI
  1248. pn = (pn + (align-1)/4) & -(align/4);
  1249. #endif
  1250. addr = (nf + pn) * 4;
  1251. pn += size;
  1252. if (!sn && pn > 4)
  1253. sn = (pn - 4);
  1254. } else {
  1255. #ifdef TCC_ARM_EABI
  1256. from_stack:
  1257. sn = (sn + (align-1)/4) & -(align/4);
  1258. #endif
  1259. addr = (n + nf + sn) * 4;
  1260. sn += size;
  1261. }
  1262. sym_push(sym->v & ~SYM_FIELD, type, VT_LOCAL | lvalue_type(type->t),
  1263. addr + 12);
  1264. }
  1265. last_itod_magic=0;
  1266. leaffunc = 1;
  1267. loc = 0;
  1268. }
  1269. /* generate function epilog */
  1270. void gfunc_epilog(void)
  1271. {
  1272. uint32_t x;
  1273. int diff;
  1274. /* Copy float return value to core register if base standard is used and
  1275. float computation is made with VFP */
  1276. #if defined(TCC_ARM_EABI) && defined(TCC_ARM_VFP)
  1277. if ((float_abi == ARM_SOFTFP_FLOAT || func_var) && is_float(func_vt.t)) {
  1278. if((func_vt.t & VT_BTYPE) == VT_FLOAT)
  1279. o(0xEE100A10); /* fmrs r0, s0 */
  1280. else {
  1281. o(0xEE100B10); /* fmrdl r0, d0 */
  1282. o(0xEE301B10); /* fmrdh r1, d0 */
  1283. }
  1284. }
  1285. #endif
  1286. o(0xE89BA800); /* restore fp, sp, pc */
  1287. diff = (-loc + 3) & -4;
  1288. #ifdef TCC_ARM_EABI
  1289. if(!leaffunc)
  1290. diff = ((diff + 11) & -8) - 4;
  1291. #endif
  1292. if(diff > 0) {
  1293. x=stuff_const(0xE24BD000, diff); /* sub sp,fp,# */
  1294. if(x)
  1295. *(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = x;
  1296. else {
  1297. int addr;
  1298. addr=ind;
  1299. o(0xE59FC004); /* ldr ip,[pc+4] */
  1300. o(0xE04BD00C); /* sub sp,fp,ip */
  1301. o(0xE1A0F00E); /* mov pc,lr */
  1302. o(diff);
  1303. *(uint32_t *)(cur_text_section->data + func_sub_sp_offset) = 0xE1000000|encbranch(func_sub_sp_offset,addr,1);
  1304. }
  1305. }
  1306. }
  1307. ST_FUNC void gen_fill_nops(int bytes)
  1308. {
  1309. if ((bytes & 3))
  1310. tcc_error("alignment of code section not multiple of 4");
  1311. while (bytes > 0) {
  1312. o(0xE1A00000);
  1313. bytes -= 4;
  1314. }
  1315. }
  1316. /* generate a jump to a label */
  1317. int gjmp(int t)
  1318. {
  1319. int r;
  1320. if (nocode_wanted)
  1321. return t;
  1322. r=ind;
  1323. o(0xE0000000|encbranch(r,t,1));
  1324. return r;
  1325. }
  1326. /* generate a jump to a fixed address */
  1327. void gjmp_addr(int a)
  1328. {
  1329. gjmp(a);
  1330. }
  1331. /* generate a test. set 'inv' to invert test. Stack entry is popped */
  1332. int gtst(int inv, int t)
  1333. {
  1334. int v, r;
  1335. uint32_t op;
  1336. v = vtop->r & VT_VALMASK;
  1337. r=ind;
  1338. if (nocode_wanted) {
  1339. ;
  1340. } else if (v == VT_CMP) {
  1341. op=mapcc(inv?negcc(vtop->c.i):vtop->c.i);
  1342. op|=encbranch(r,t,1);
  1343. o(op);
  1344. t=r;
  1345. } else if (v == VT_JMP || v == VT_JMPI) {
  1346. if ((v & 1) == inv) {
  1347. if(!vtop->c.i)
  1348. vtop->c.i=t;
  1349. else {
  1350. uint32_t *x;
  1351. int p,lp;
  1352. if(t) {
  1353. p = vtop->c.i;
  1354. do {
  1355. p = decbranch(lp=p);
  1356. } while(p);
  1357. x = (uint32_t *)(cur_text_section->data + lp);
  1358. *x &= 0xff000000;
  1359. *x |= encbranch(lp,t,1);
  1360. }
  1361. t = vtop->c.i;
  1362. }
  1363. } else {
  1364. t = gjmp(t);
  1365. gsym(vtop->c.i);
  1366. }
  1367. }
  1368. vtop--;
  1369. return t;
  1370. }
  1371. /* generate an integer binary operation */
  1372. void gen_opi(int op)
  1373. {
  1374. int c, func = 0;
  1375. uint32_t opc = 0, r, fr;
  1376. unsigned short retreg = REG_IRET;
  1377. c=0;
  1378. switch(op) {
  1379. case '+':
  1380. opc = 0x8;
  1381. c=1;
  1382. break;
  1383. case TOK_ADDC1: /* add with carry generation */
  1384. opc = 0x9;
  1385. c=1;
  1386. break;
  1387. case '-':
  1388. opc = 0x4;
  1389. c=1;
  1390. break;
  1391. case TOK_SUBC1: /* sub with carry generation */
  1392. opc = 0x5;
  1393. c=1;
  1394. break;
  1395. case TOK_ADDC2: /* add with carry use */
  1396. opc = 0xA;
  1397. c=1;
  1398. break;
  1399. case TOK_SUBC2: /* sub with carry use */
  1400. opc = 0xC;
  1401. c=1;
  1402. break;
  1403. case '&':
  1404. opc = 0x0;
  1405. c=1;
  1406. break;
  1407. case '^':
  1408. opc = 0x2;
  1409. c=1;
  1410. break;
  1411. case '|':
  1412. opc = 0x18;
  1413. c=1;
  1414. break;
  1415. case '*':
  1416. gv2(RC_INT, RC_INT);
  1417. r = vtop[-1].r;
  1418. fr = vtop[0].r;
  1419. vtop--;
  1420. o(0xE0000090|(intr(r)<<16)|(intr(r)<<8)|intr(fr));
  1421. return;
  1422. case TOK_SHL:
  1423. opc = 0;
  1424. c=2;
  1425. break;
  1426. case TOK_SHR:
  1427. opc = 1;
  1428. c=2;
  1429. break;
  1430. case TOK_SAR:
  1431. opc = 2;
  1432. c=2;
  1433. break;
  1434. case '/':
  1435. case TOK_PDIV:
  1436. func=TOK___divsi3;
  1437. c=3;
  1438. break;
  1439. case TOK_UDIV:
  1440. func=TOK___udivsi3;
  1441. c=3;
  1442. break;
  1443. case '%':
  1444. #ifdef TCC_ARM_EABI
  1445. func=TOK___aeabi_idivmod;
  1446. retreg=REG_LRET;
  1447. #else
  1448. func=TOK___modsi3;
  1449. #endif
  1450. c=3;
  1451. break;
  1452. case TOK_UMOD:
  1453. #ifdef TCC_ARM_EABI
  1454. func=TOK___aeabi_uidivmod;
  1455. retreg=REG_LRET;
  1456. #else
  1457. func=TOK___umodsi3;
  1458. #endif
  1459. c=3;
  1460. break;
  1461. case TOK_UMULL:
  1462. gv2(RC_INT, RC_INT);
  1463. r=intr(vtop[-1].r2=get_reg(RC_INT));
  1464. c=vtop[-1].r;
  1465. vtop[-1].r=get_reg_ex(RC_INT,regmask(c));
  1466. vtop--;
  1467. o(0xE0800090|(r<<16)|(intr(vtop->r)<<12)|(intr(c)<<8)|intr(vtop[1].r));
  1468. return;
  1469. default:
  1470. opc = 0x15;
  1471. c=1;
  1472. break;
  1473. }
  1474. switch(c) {
  1475. case 1:
  1476. if((vtop[-1].r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
  1477. if(opc == 4 || opc == 5 || opc == 0xc) {
  1478. vswap();
  1479. opc|=2; // sub -> rsb
  1480. }
  1481. }
  1482. if ((vtop->r & VT_VALMASK) == VT_CMP ||
  1483. (vtop->r & (VT_VALMASK & ~1)) == VT_JMP)
  1484. gv(RC_INT);
  1485. vswap();
  1486. c=intr(gv(RC_INT));
  1487. vswap();
  1488. opc=0xE0000000|(opc<<20)|(c<<16);
  1489. if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
  1490. uint32_t x;
  1491. x=stuff_const(opc|0x2000000,vtop->c.i);
  1492. if(x) {
  1493. r=intr(vtop[-1].r=get_reg_ex(RC_INT,regmask(vtop[-1].r)));
  1494. o(x|(r<<12));
  1495. goto done;
  1496. }
  1497. }
  1498. fr=intr(gv(RC_INT));
  1499. r=intr(vtop[-1].r=get_reg_ex(RC_INT,two2mask(vtop->r,vtop[-1].r)));
  1500. o(opc|(r<<12)|fr);
  1501. done:
  1502. vtop--;
  1503. if (op >= TOK_ULT && op <= TOK_GT) {
  1504. vtop->r = VT_CMP;
  1505. vtop->c.i = op;
  1506. }
  1507. break;
  1508. case 2:
  1509. opc=0xE1A00000|(opc<<5);
  1510. if ((vtop->r & VT_VALMASK) == VT_CMP ||
  1511. (vtop->r & (VT_VALMASK & ~1)) == VT_JMP)
  1512. gv(RC_INT);
  1513. vswap();
  1514. r=intr(gv(RC_INT));
  1515. vswap();
  1516. opc|=r;
  1517. if ((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) == VT_CONST) {
  1518. fr=intr(vtop[-1].r=get_reg_ex(RC_INT,regmask(vtop[-1].r)));
  1519. c = vtop->c.i & 0x1f;
  1520. o(opc|(c<<7)|(fr<<12));
  1521. } else {
  1522. fr=intr(gv(RC_INT));
  1523. c=intr(vtop[-1].r=get_reg_ex(RC_INT,two2mask(vtop->r,vtop[-1].r)));
  1524. o(opc|(c<<12)|(fr<<8)|0x10);
  1525. }
  1526. vtop--;
  1527. break;
  1528. case 3:
  1529. vpush_global_sym(&func_old_type, func);
  1530. vrott(3);
  1531. gfunc_call(2);
  1532. vpushi(0);
  1533. vtop->r = retreg;
  1534. break;
  1535. default:
  1536. tcc_error("gen_opi %i unimplemented!",op);
  1537. }
  1538. }
  1539. #ifdef TCC_ARM_VFP
  1540. static int is_zero(int i)
  1541. {
  1542. if((vtop[i].r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST)
  1543. return 0;
  1544. if (vtop[i].type.t == VT_FLOAT)
  1545. return (vtop[i].c.f == 0.f);
  1546. else if (vtop[i].type.t == VT_DOUBLE)
  1547. return (vtop[i].c.d == 0.0);
  1548. return (vtop[i].c.ld == 0.l);
  1549. }
  1550. /* generate a floating point operation 'v = t1 op t2' instruction. The
  1551. * two operands are guaranteed to have the same floating point type */
  1552. void gen_opf(int op)
  1553. {
  1554. uint32_t x;
  1555. int fneg=0,r;
  1556. x=0xEE000A00|T2CPR(vtop->type.t);
  1557. switch(op) {
  1558. case '+':
  1559. if(is_zero(-1))
  1560. vswap();
  1561. if(is_zero(0)) {
  1562. vtop--;
  1563. return;
  1564. }
  1565. x|=0x300000;
  1566. break;
  1567. case '-':
  1568. x|=0x300040;
  1569. if(is_zero(0)) {
  1570. vtop--;
  1571. return;
  1572. }
  1573. if(is_zero(-1)) {
  1574. x|=0x810000; /* fsubX -> fnegX */
  1575. vswap();
  1576. vtop--;
  1577. fneg=1;
  1578. }
  1579. break;
  1580. case '*':
  1581. x|=0x200000;
  1582. break;
  1583. case '/':
  1584. x|=0x800000;
  1585. break;
  1586. default:
  1587. if(op < TOK_ULT || op > TOK_GT) {
  1588. tcc_error("unknown fp op %x!",op);
  1589. return;
  1590. }
  1591. if(is_zero(-1)) {
  1592. vswap();
  1593. switch(op) {
  1594. case TOK_LT: op=TOK_GT; break;
  1595. case TOK_GE: op=TOK_ULE; break;
  1596. case TOK_LE: op=TOK_GE; break;
  1597. case TOK_GT: op=TOK_ULT; break;
  1598. }
  1599. }
  1600. x|=0xB40040; /* fcmpX */
  1601. if(op!=TOK_EQ && op!=TOK_NE)
  1602. x|=0x80; /* fcmpX -> fcmpeX */
  1603. if(is_zero(0)) {
  1604. vtop--;
  1605. o(x|0x10000|(vfpr(gv(RC_FLOAT))<<12)); /* fcmp(e)X -> fcmp(e)zX */
  1606. } else {
  1607. x|=vfpr(gv(RC_FLOAT));
  1608. vswap();
  1609. o(x|(vfpr(gv(RC_FLOAT))<<12));
  1610. vtop--;
  1611. }
  1612. o(0xEEF1FA10); /* fmstat */
  1613. switch(op) {
  1614. case TOK_LE: op=TOK_ULE; break;
  1615. case TOK_LT: op=TOK_ULT; break;
  1616. case TOK_UGE: op=TOK_GE; break;
  1617. case TOK_UGT: op=TOK_GT; break;
  1618. }
  1619. vtop->r = VT_CMP;
  1620. vtop->c.i = op;
  1621. return;
  1622. }
  1623. r=gv(RC_FLOAT);
  1624. x|=vfpr(r);
  1625. r=regmask(r);
  1626. if(!fneg) {
  1627. int r2;
  1628. vswap();
  1629. r2=gv(RC_FLOAT);
  1630. x|=vfpr(r2)<<16;
  1631. r|=regmask(r2);
  1632. }
  1633. vtop->r=get_reg_ex(RC_FLOAT,r);
  1634. if(!fneg)
  1635. vtop--;
  1636. o(x|(vfpr(vtop->r)<<12));
  1637. }
  1638. #else
  1639. static uint32_t is_fconst()
  1640. {
  1641. long double f;
  1642. uint32_t r;
  1643. if((vtop->r & (VT_VALMASK | VT_LVAL | VT_SYM)) != VT_CONST)
  1644. return 0;
  1645. if (vtop->type.t == VT_FLOAT)
  1646. f = vtop->c.f;
  1647. else if (vtop->type.t == VT_DOUBLE)
  1648. f = vtop->c.d;
  1649. else
  1650. f = vtop->c.ld;
  1651. if(!ieee_finite(f))
  1652. return 0;
  1653. r=0x8;
  1654. if(f<0.0) {
  1655. r=0x18;
  1656. f=-f;
  1657. }
  1658. if(f==0.0)
  1659. return r;
  1660. if(f==1.0)
  1661. return r|1;
  1662. if(f==2.0)
  1663. return r|2;
  1664. if(f==3.0)
  1665. return r|3;
  1666. if(f==4.0)
  1667. return r|4;
  1668. if(f==5.0)
  1669. return r|5;
  1670. if(f==0.5)
  1671. return r|6;
  1672. if(f==10.0)
  1673. return r|7;
  1674. return 0;
  1675. }
  1676. /* generate a floating point operation 'v = t1 op t2' instruction. The
  1677. two operands are guaranteed to have the same floating point type */
  1678. void gen_opf(int op)
  1679. {
  1680. uint32_t x, r, r2, c1, c2;
  1681. //fputs("gen_opf\n",stderr);
  1682. vswap();
  1683. c1 = is_fconst();
  1684. vswap();
  1685. c2 = is_fconst();
  1686. x=0xEE000100;
  1687. #if LDOUBLE_SIZE == 8
  1688. if ((vtop->type.t & VT_BTYPE) != VT_FLOAT)
  1689. x|=0x80;
  1690. #else
  1691. if ((vtop->type.t & VT_BTYPE) == VT_DOUBLE)
  1692. x|=0x80;
  1693. else if ((vtop->type.t & VT_BTYPE) == VT_LDOUBLE)
  1694. x|=0x80000;
  1695. #endif
  1696. switch(op)
  1697. {
  1698. case '+':
  1699. if(!c2) {
  1700. vswap();
  1701. c2=c1;
  1702. }
  1703. vswap();
  1704. r=fpr(gv(RC_FLOAT));
  1705. vswap();
  1706. if(c2) {
  1707. if(c2>0xf)
  1708. x|=0x200000; // suf
  1709. r2=c2&0xf;
  1710. } else {
  1711. r2=fpr(gv(RC_FLOAT));
  1712. }
  1713. break;
  1714. case '-':
  1715. if(c2) {
  1716. if(c2<=0xf)
  1717. x|=0x200000; // suf
  1718. r2=c2&0xf;
  1719. vswap();
  1720. r=fpr(gv(RC_FLOAT));
  1721. vswap();
  1722. } else if(c1 && c1<=0xf) {
  1723. x|=0x300000; // rsf
  1724. r2=c1;
  1725. r=fpr(gv(RC_FLOAT));
  1726. vswap();
  1727. } else {
  1728. x|=0x200000; // suf
  1729. vswap();
  1730. r=fpr(gv(RC_FLOAT));
  1731. vswap();
  1732. r2=fpr(gv(RC_FLOAT));
  1733. }
  1734. break;
  1735. case '*':
  1736. if(!c2 || c2>0xf) {
  1737. vswap();
  1738. c2=c1;
  1739. }
  1740. vswap();
  1741. r=fpr(gv(RC_FLOAT));
  1742. vswap();
  1743. if(c2 && c2<=0xf)
  1744. r2=c2;
  1745. else
  1746. r2=fpr(gv(RC_FLOAT));
  1747. x|=0x100000; // muf
  1748. break;
  1749. case '/':
  1750. if(c2 && c2<=0xf) {
  1751. x|=0x400000; // dvf
  1752. r2=c2;
  1753. vswap();
  1754. r=fpr(gv(RC_FLOAT));
  1755. vswap();
  1756. } else if(c1 && c1<=0xf) {
  1757. x|=0x500000; // rdf
  1758. r2=c1;
  1759. r=fpr(gv(RC_FLOAT));
  1760. vswap();
  1761. } else {
  1762. x|=0x400000; // dvf
  1763. vswap();
  1764. r=fpr(gv(RC_FLOAT));
  1765. vswap();
  1766. r2=fpr(gv(RC_FLOAT));
  1767. }
  1768. break;
  1769. default:
  1770. if(op >= TOK_ULT && op <= TOK_GT) {
  1771. x|=0xd0f110; // cmfe
  1772. /* bug (intention?) in Linux FPU emulator
  1773. doesn't set carry if equal */
  1774. switch(op) {
  1775. case TOK_ULT:
  1776. case TOK_UGE:
  1777. case TOK_ULE:
  1778. case TOK_UGT:
  1779. tcc_error("unsigned comparison on floats?");
  1780. break;
  1781. case TOK_LT:
  1782. op=TOK_Nset;
  1783. break;
  1784. case TOK_LE:
  1785. op=TOK_ULE; /* correct in unordered case only if AC bit in FPSR set */
  1786. break;
  1787. case TOK_EQ:
  1788. case TOK_NE:
  1789. x&=~0x400000; // cmfe -> cmf
  1790. break;
  1791. }
  1792. if(c1 && !c2) {
  1793. c2=c1;
  1794. vswap();
  1795. switch(op) {
  1796. case TOK_Nset:
  1797. op=TOK_GT;
  1798. break;
  1799. case TOK_GE:
  1800. op=TOK_ULE;
  1801. break;
  1802. case TOK_ULE:
  1803. op=TOK_GE;
  1804. break;
  1805. case TOK_GT:
  1806. op=TOK_Nset;
  1807. break;
  1808. }
  1809. }
  1810. vswap();
  1811. r=fpr(gv(RC_FLOAT));
  1812. vswap();
  1813. if(c2) {
  1814. if(c2>0xf)
  1815. x|=0x200000;
  1816. r2=c2&0xf;
  1817. } else {
  1818. r2=fpr(gv(RC_FLOAT));
  1819. }
  1820. vtop[-1].r = VT_CMP;
  1821. vtop[-1].c.i = op;
  1822. } else {
  1823. tcc_error("unknown fp op %x!",op);
  1824. return;
  1825. }
  1826. }
  1827. if(vtop[-1].r == VT_CMP)
  1828. c1=15;
  1829. else {
  1830. c1=vtop->r;
  1831. if(r2&0x8)
  1832. c1=vtop[-1].r;
  1833. vtop[-1].r=get_reg_ex(RC_FLOAT,two2mask(vtop[-1].r,c1));
  1834. c1=fpr(vtop[-1].r);
  1835. }
  1836. vtop--;
  1837. o(x|(r<<16)|(c1<<12)|r2);
  1838. }
  1839. #endif
  1840. /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
  1841. and 'long long' cases. */
  1842. ST_FUNC void gen_cvt_itof1(int t)
  1843. {
  1844. uint32_t r, r2;
  1845. int bt;
  1846. bt=vtop->type.t & VT_BTYPE;
  1847. if(bt == VT_INT || bt == VT_SHORT || bt == VT_BYTE) {
  1848. #ifndef TCC_ARM_VFP
  1849. uint32_t dsize = 0;
  1850. #endif
  1851. r=intr(gv(RC_INT));
  1852. #ifdef TCC_ARM_VFP
  1853. r2=vfpr(vtop->r=get_reg(RC_FLOAT));
  1854. o(0xEE000A10|(r<<12)|(r2<<16)); /* fmsr */
  1855. r2|=r2<<12;
  1856. if(!(vtop->type.t & VT_UNSIGNED))
  1857. r2|=0x80; /* fuitoX -> fsituX */
  1858. o(0xEEB80A40|r2|T2CPR(t)); /* fYitoX*/
  1859. #else
  1860. r2=fpr(vtop->r=get_reg(RC_FLOAT));
  1861. if((t & VT_BTYPE) != VT_FLOAT)
  1862. dsize=0x80; /* flts -> fltd */
  1863. o(0xEE000110|dsize|(r2<<16)|(r<<12)); /* flts */
  1864. if((vtop->type.t & (VT_UNSIGNED|VT_BTYPE)) == (VT_UNSIGNED|VT_INT)) {
  1865. uint32_t off = 0;
  1866. o(0xE3500000|(r<<12)); /* cmp */
  1867. r=fpr(get_reg(RC_FLOAT));
  1868. if(last_itod_magic) {
  1869. off=ind+8-last_itod_magic;
  1870. off/=4;
  1871. if(off>255)
  1872. off=0;
  1873. }
  1874. o(0xBD1F0100|(r<<12)|off); /* ldflts */
  1875. if(!off) {
  1876. o(0xEA000000); /* b */
  1877. last_itod_magic=ind;
  1878. o(0x4F800000); /* 4294967296.0f */
  1879. }
  1880. o(0xBE000100|dsize|(r2<<16)|(r2<<12)|r); /* adflt */
  1881. }
  1882. #endif
  1883. return;
  1884. } else if(bt == VT_LLONG) {
  1885. int func;
  1886. CType *func_type = 0;
  1887. if((t & VT_BTYPE) == VT_FLOAT) {
  1888. func_type = &func_float_type;
  1889. if(vtop->type.t & VT_UNSIGNED)
  1890. func=TOK___floatundisf;
  1891. else
  1892. func=TOK___floatdisf;
  1893. #if LDOUBLE_SIZE != 8
  1894. } else if((t & VT_BTYPE) == VT_LDOUBLE) {
  1895. func_type = &func_ldouble_type;
  1896. if(vtop->type.t & VT_UNSIGNED)
  1897. func=TOK___floatundixf;
  1898. else
  1899. func=TOK___floatdixf;
  1900. } else if((t & VT_BTYPE) == VT_DOUBLE) {
  1901. #else
  1902. } else if((t & VT_BTYPE) == VT_DOUBLE || (t & VT_BTYPE) == VT_LDOUBLE) {
  1903. #endif
  1904. func_type = &func_double_type;
  1905. if(vtop->type.t & VT_UNSIGNED)
  1906. func=TOK___floatundidf;
  1907. else
  1908. func=TOK___floatdidf;
  1909. }
  1910. if(func_type) {
  1911. vpush_global_sym(func_type, func);
  1912. vswap();
  1913. gfunc_call(1);
  1914. vpushi(0);
  1915. vtop->r=TREG_F0;
  1916. return;
  1917. }
  1918. }
  1919. tcc_error("unimplemented gen_cvt_itof %x!",vtop->type.t);
  1920. }
  1921. /* convert fp to int 't' type */
  1922. void gen_cvt_ftoi(int t)
  1923. {
  1924. uint32_t r, r2;
  1925. int u, func = 0;
  1926. u=t&VT_UNSIGNED;
  1927. t&=VT_BTYPE;
  1928. r2=vtop->type.t & VT_BTYPE;
  1929. if(t==VT_INT) {
  1930. #ifdef TCC_ARM_VFP
  1931. r=vfpr(gv(RC_FLOAT));
  1932. u=u?0:0x10000;
  1933. o(0xEEBC0AC0|(r<<12)|r|T2CPR(r2)|u); /* ftoXizY */
  1934. r2=intr(vtop->r=get_reg(RC_INT));
  1935. o(0xEE100A10|(r<<16)|(r2<<12));
  1936. return;
  1937. #else
  1938. if(u) {
  1939. if(r2 == VT_FLOAT)
  1940. func=TOK___fixunssfsi;
  1941. #if LDOUBLE_SIZE != 8
  1942. else if(r2 == VT_LDOUBLE)
  1943. func=TOK___fixunsxfsi;
  1944. else if(r2 == VT_DOUBLE)
  1945. #else
  1946. else if(r2 == VT_LDOUBLE || r2 == VT_DOUBLE)
  1947. #endif
  1948. func=TOK___fixunsdfsi;
  1949. } else {
  1950. r=fpr(gv(RC_FLOAT));
  1951. r2=intr(vtop->r=get_reg(RC_INT));
  1952. o(0xEE100170|(r2<<12)|r);
  1953. return;
  1954. }
  1955. #endif
  1956. } else if(t == VT_LLONG) { // unsigned handled in gen_cvt_ftoi1
  1957. if(r2 == VT_FLOAT)
  1958. func=TOK___fixsfdi;
  1959. #if LDOUBLE_SIZE != 8
  1960. else if(r2 == VT_LDOUBLE)
  1961. func=TOK___fixxfdi;
  1962. else if(r2 == VT_DOUBLE)
  1963. #else
  1964. else if(r2 == VT_LDOUBLE || r2 == VT_DOUBLE)
  1965. #endif
  1966. func=TOK___fixdfdi;
  1967. }
  1968. if(func) {
  1969. vpush_global_sym(&func_old_type, func);
  1970. vswap();
  1971. gfunc_call(1);
  1972. vpushi(0);
  1973. if(t == VT_LLONG)
  1974. vtop->r2 = REG_LRET;
  1975. vtop->r = REG_IRET;
  1976. return;
  1977. }
  1978. tcc_error("unimplemented gen_cvt_ftoi!");
  1979. }
  1980. /* convert from one floating point type to another */
  1981. void gen_cvt_ftof(int t)
  1982. {
  1983. #ifdef TCC_ARM_VFP
  1984. if(((vtop->type.t & VT_BTYPE) == VT_FLOAT) != ((t & VT_BTYPE) == VT_FLOAT)) {
  1985. uint32_t r = vfpr(gv(RC_FLOAT));
  1986. o(0xEEB70AC0|(r<<12)|r|T2CPR(vtop->type.t));
  1987. }
  1988. #else
  1989. /* all we have to do on i386 and FPA ARM is to put the float in a register */
  1990. gv(RC_FLOAT);
  1991. #endif
  1992. }
  1993. /* computed goto support */
  1994. void ggoto(void)
  1995. {
  1996. gcall_or_jmp(1);
  1997. vtop--;
  1998. }
  1999. /* Save the stack pointer onto the stack and return the location of its address */
  2000. ST_FUNC void gen_vla_sp_save(int addr) {
  2001. SValue v;
  2002. v.type.t = VT_PTR;
  2003. v.r = VT_LOCAL | VT_LVAL;
  2004. v.c.i = addr;
  2005. store(TREG_SP, &v);
  2006. }
  2007. /* Restore the SP from a location on the stack */
  2008. ST_FUNC void gen_vla_sp_restore(int addr) {
  2009. SValue v;
  2010. v.type.t = VT_PTR;
  2011. v.r = VT_LOCAL | VT_LVAL;
  2012. v.c.i = addr;
  2013. load(TREG_SP, &v);
  2014. }
  2015. /* Subtract from the stack pointer, and push the resulting value onto the stack */
  2016. ST_FUNC void gen_vla_alloc(CType *type, int align) {
  2017. int r = intr(gv(RC_INT));
  2018. o(0xE04D0000|(r<<12)|r); /* sub r, sp, r */
  2019. #ifdef TCC_ARM_EABI
  2020. if (align < 8)
  2021. align = 8;
  2022. #else
  2023. if (align < 4)
  2024. align = 4;
  2025. #endif
  2026. if (align & (align - 1))
  2027. tcc_error("alignment is not a power of 2: %i", align);
  2028. o(stuff_const(0xE3C0D000|(r<<16), align - 1)); /* bic sp, r, #align-1 */
  2029. vpop();
  2030. }
  2031. /* end of ARM code generator */
  2032. /*************************************************************/
  2033. #endif
  2034. /*************************************************************/